STMicroelectronics and Synopsys Demonstrate Interoperability of their SATA IP cores for 90nm Technology


GENEVA and MOUNTAIN VIEW, Calif., September 21, 2005 - STMicroelectronics (NYSE: STM), a world leading supplier for hard-disk drive chips, and Synopsys (Nasdaq: SNPS), a world leader in semiconductor design software, today announced that the two companies are working together to conduct Serial ATA (SATA) interoperability testing using ST's 90 nanometer (nm) MIPHY (Multi-Interface PHY) Physical Layer interface macro-cell and Synopsys' DesignWare® SATA Host Controller intellectual property (IP) core. Interoperability testing reduces integration risk and speeds time to market for designers integrating SATA functionality into their system-on-chip (SoC) designs.

The joint ST and Synopsys solution for SATA is fully compliant with the current version of the SATA Integrated Specification Revision 2.5, including support for the latest features such as Native Command Queuing (NCQ) and 3Gbps (gigabits per second) operating speed. The MIPHY test chip already operates at up to 6Gbps, preparing the way for the next evolution of the SATA and SAS standards.

"Synopsys, the market leader in connectivity IP, worked closely with STMicroelectronics to bring our joint SATA solution to the compliance testing workshops," said Guri Stark, vice president of Marketing, Synopsys Solutions Group. "Demonstrating interoperability of the DesignWare SATA Host Controller core with STMicroelectronics' MIPHY provides a high-quality, low risk solution for designers integrating SATA functionality into their designs."

"ST's close collaboration with Synopsys has allowed us to implement and fully verify the interoperability of the MIPHY during the Plugfest," said Roberto Fantechi, General Manager of ST's Data Storage Division. "We are extremely satisfied with the performance of the macrocell, even when exposed to noisy environments and temperature, and supply voltage worst case conditions."

About the Synopsys DesignWare SATA Host Controller Core
The DesignWare Cores SATA Host Controller is a high-quality, silicon-proven IP core designed for easy SoC integration. The IP uses the popular AHB(TM) standard for a host interface and configurable PHY/link interface to support a number of industry PHYs. Synopsys provides a large set of parameters to enable the IP's integration in systems with different requirements. By leveraging these parameters, designers can optimize gate count and reduce integration time.

About the ST 90nm MIPHY
ST announced successful fabrication of the MIPHY macro-cell in 90-nm technology earlier this year, revealing its outstanding jitter performance, a critical factor for SATA controllers. The MIPHY is designed to be integrated with other functions into a System-on-Chip (SoC) device for use in disk drives, where its multi-standard capability will allow drive manufacturers to reduce costs by building and stocking one IC to control drives operating on different protocols. MIPHY supports the Serial Attached SCSI (SAS), Fibre Channel, and PCI Express® serial interface standards, as well as SATA. The MIPHY further enriches ST's broad portfolio of silicon-validated IP in the company's state-of-the-art 90nm-process family, which is in volume production at the Crolles2 facility in France.

The MIPHY achieves a very low power dissipation of less than 150mW when operating at 3Gbps, significantly lower than competitive solutions, increasing to only around 170mW at 6Gbps. Jitter performance is exceptional, with random jitter measured at less than 2ps (picoseconds), and total jitter - random plus deterministic - less than 50ps. Jitter is a measure of unwanted variations in timing; as speeds increase the margin for jitter becomes smaller, and very good jitter performance is the key to maintaining high transmission efficiency.

SATA is designed to overcome electrical constraints restricting speed enhancements for the classic parallel ATA bus. ST's Physical Layer macro-cell performs the high-speed data serialization and de-serialization function, and provides a 20-bit as well as a 10-bit wide parallel interface to the link layer. It can perform either host or device operations, and can drive external signals directly without needing additional external components.

About SATA
Serial ATA is the higher speed, lower power, evolutionary replacement for the Parallel ATA (PATA) interface standard that until recently has been used in almost all hard disk drives for both desktop and laptop computers. Storage devices based on SATA benefit from greater speed, simpler upgrades and easier configuration. The Serial ATA International Organization (SATA-IO) is an independent, non-profit organization developed by and for leading industry companies. SATA-IO Plugfest aims to act as a catalyst, bringing together companies working on Serial ATA to make it easy for them to quickly assess the health of their product through interoperability testing.

About STMicroelectronics
STMicroelectronics is a global leader in developing and delivering semiconductor solutions across the spectrum of microelectronics applications. An unrivalled combination of silicon and system expertise, manufacturing strength, Intellectual Property (IP) portfolio and strategic partners positions the Company at the forefront of System-on-Chip (SoC) technology and its products play a key role in enabling today's convergence markets. The Company's shares are traded on the New York Stock Exchange, on Euronext Paris and on the Milan Stock Exchange. In 2004, the Company's net revenues were $8.76 billion and net earnings were $601 million. Further information on ST can be found at www.st.com.

About Synopsys
Synopsys, Inc. (NASDAQ:SNPS) is a world leader in electronic design automation (EDA) software for semiconductor design. The company delivers technology-leading semiconductor design and verification platforms and IC manufacturing software products to the global electronics market, enabling the development and production of complex systems-on-chips (SoCs). Synopsys also provides intellectual property and design services to simplify the design process and accelerate time-to-market for its customers. Synopsys is headquartered in Mountain View, California and has offices in more than 60 locations throughout North America, Europe, Japan and Asia. Visit Synopsys online at www.synopsys.com.

Synopsys and DesignWare are registered trademarks of Synopsys, Inc. AHB is a trademark of ARM Limited in the UK. Any other trademarks are the property of their respective holders and should be treated as such.
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PR Contacts:

STMicroelectronics
Michael Markowitz
Director of Worldwide Technical Media Relations
Tel: +1 212 821-8959
michael.markowitz@st.com

Synopsys
Yvette Huygen
PR Manager
Tel: +1 650 584-4547
yvetteh@synopsys.com

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