WILSONVILLE, Ore., November 27, 2007 - Mentor Graphics Corporation (Nasdaq: MENT) today announced that STMicroelectronics, the number one supplier of semiconductors for set-top box applications, has taped out an advanced process, multi-million gate set-top box chip using the Mentor Olympus-SoC(TM) place and route system. The Olympus-SoC product is the next-generation netlist-to-GDSII system that concurrently optimizes for variations in design modes, process corners and manufacturing variations. It is targeted for high-end customers in wireless, handheld, graphics, set-top box, networking and processor application segments who are designing at advanced process nodes.
"We used Olympus-SoC to tape out an advanced set-top box chip containing 12 million gates and manufactured using an 80nm process. Although this is an extremely complex design with six modes and four corners of operation, we were able to complete the migration to the 80nm process in a fraction of the original three month schedule," said Thierry Bauchon, R&D Director, Home Entertainment & Displays Group, STMicroelectronics. "We are extremely pleased with the Olympus-SoC product's ability to deliver this first-pass functional silicon, and we are impressed with the overall quality of results including design rule check (DRC) clean routing, multi-corner-multi-mode timing closure, and fast runtimes for large capacity chips."
"We are very excited by STMicroelectronics' design success using Mentor Graphics Olympus-SoC," said Pravin Madhani, general manager for the place and route division at Mentor Graphics. "The Olympus-SoC place and route system is quickly gaining momentum as designers replace their existing solutions to take advantage of our innovative architecture, high capacity data model, concurrent analysis and optimization across multiple modes and corners, and litho-driven routing for their advanced process technologies."
About the Olympus-SoC Product
Olympus-SoC, Mentor's flagship place and route product, provides the next generation netlist-to-GDSII system that concurrently optimizes variations in lithography, process corners, and design modes. It comprehensively addresses the performance, capacity, time-to-market, and variability challenges occurring at the 65nm, 45nm, and smaller process nodes. It is built on Mentor's premier design-for-variability platform, and is proven with multiple tapeouts in various application segments. Product highlights include adaptive variability engine, multi-corner clock tree synthesis (CTS), lithography-driven detailed router, optRoute, embedded signoff quality timing engine, multi-corner Signal Integrity, and advanced chip assembly capabilities in addition to an open architecture and ultra-compact database that can handle extremely large capacities.
About Mentor Graphics
Mentor Graphics Corporation (Nasdaq: MENT) is a world leader in electronic hardware and software design solutions, providing products, consulting services and award-winning support for the world's most successful electronics and semiconductor companies. Established in 1981, the company reported revenues over the last 12 months of over $825 million and employs approximately 4,300 people worldwide. Corporate headquarters are located at 8005 S.W. Boeckman Road, Wilsonville, Oregon 97070-7777. World Wide Web site: http://www.mentor.com/.
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