Cadence Design Systems, Inc.

Test & Measurement

Cadence Modus Test Solution Enables Support for Safety-Critical SoC Designs Using ARM MBIST Interface

Highlights: - Collaboration helps customers reduce the need for manual work and speed time to market - Cadence and ARM complete silicon validation using ARM Cortex-A73 processor SAN JOSE, Calif., Nov. 14, 2016 - Cadence Design Systems, Inc. (NASDAQ: CDNS) today announced that the Cadence® Modus™ Test Solution now supports the ARM® Memory Built-In Self Test (MBIST) interface, enabling...

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Test & Measurement

Cadence Modus Test Solution Enables Support for Safety-Critical SoC Designs Using ARM MBIST Interface

Highlights: - Collaboration helps customers reduce the need for manual work and speed time to market - Cadence and ARM complete silicon validation using ARM Cortex-A73 processor SAN JOSE, Calif., Nov. 14, 2016 - Cadence Design Systems, Inc. (NASDAQ: CDNS) today announced that the Cadence® Modus™ Test Solution now supports the ARM® Memory Built-In Self Test (MBIST) interface, enabling...

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Computer Hardware & Peripherals

Cadence RAK for ARM Cortex-M23 and Cortex-M33 processors.

Creating low-power ARM Cortex-M23 and Cortex-M33 processors, Cadence’s Rapid Adoption Kit address the development of secure IoT rapidly and efficiently. Consisting of end-to-end digital implementation and signoff flow, RAK enables quick silicon delivery of ARM-based applications. Features optimal power, performance and area, fast runtimes and efficient design closures and implementation of IoT...

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Computer Hardware & Peripherals

Cadence RAK for ARM Cortex-M23 and Cortex-M33 processors.

Creating low-power ARM Cortex-M23 and Cortex-M33 processors, Cadence’s Rapid Adoption Kit address the development of secure IoT rapidly and efficiently. Consisting of end-to-end digital implementation and signoff flow, RAK enables quick silicon delivery of ARM-based applications. Features optimal power, performance and area, fast runtimes and efficient design closures and implementation of IoT...

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Software

Cadence Enables Customer Innovation with ARM-Optimized Solutions from Chips to Boards to Systems at ARM TechCon 2016

SAN JOSE, Calif., Oct. 18, 2016 -- Cadence Design Systems, Inc. (NASDAQ: CDNS) today announced it will showcase ARM®-optimized solutions from chips to boards to systems at ARM TechCon 2016. The event is being held October 25-27, 2016, in Santa Clara, Calif., with Cadence®, a diamond sponsor, in booth 200. To register for the conference, visit www.armtechcon.com. WHAT: Cadence and its customers...

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Software

Cadence Enables Customer Innovation with ARM-Optimized Solutions from Chips to Boards to Systems at ARM TechCon 2016

SAN JOSE, Calif., Oct. 18, 2016 -- Cadence Design Systems, Inc. (NASDAQ: CDNS) today announced it will showcase ARM®-optimized solutions from chips to boards to systems at ARM TechCon 2016. The event is being held October 25-27, 2016, in Santa Clara, Calif., with Cadence®, a diamond sponsor, in booth 200. To register for the conference, visit www.armtechcon.com. WHAT: Cadence and its customers...

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Software

TSMC's System Design Solution for advanced wafer-level Integrated Fan-Out (InFO) packaging technology.

With analysis tools that enable concurrent multi-chip optimization for designs- using InFO, this design solution includes multiple IC signoff solutions including, the Tempus™ Timing Signoff Solution, the Voltus™-Sigrity Package Analysis that offer multi-die concurrent electro-migration IR drop (EMIR) analysis, and the Cadence Physical Verification System (PVS), which provides DRC and layout...

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Software

TSMC's System Design Solution for advanced wafer-level Integrated Fan-Out (InFO) packaging technology.

With analysis tools that enable concurrent multi-chip optimization for designs- using InFO, this design solution includes multiple IC signoff solutions including, the Tempus™ Timing Signoff Solution, the Voltus™-Sigrity Package Analysis that offer multi-die concurrent electro-migration IR drop (EMIR) analysis, and the Cadence Physical Verification System (PVS), which provides DRC and layout...

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Electronic Components & Devices

Processor Architecture has optimized floating-point scalability.

To meet- DSP application demands, 12th generation Tensilica® Xtensa® base processor architecture makes technologies available for customization and increases floating-point choices from 2 to 64 FLOPS/cycle. Features include click-box options for Tensilica Vision P6 DSP- and Fusion G3 DSP and ConnX BBE DSP support. Additional tools include hardware floating-point ABI for increased...

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Electronic Components & Devices

Processor Architecture has optimized floating-point scalability.

To meet- DSP application demands, 12th generation Tensilica® Xtensa® base processor architecture makes technologies available for customization and increases floating-point choices from 2 to 64 FLOPS/cycle. Features include click-box options for Tensilica Vision P6 DSP- and Fusion G3 DSP and ConnX BBE DSP support. Additional tools include hardware floating-point ABI for increased...

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