Synopsys, Inc.
Mountain View, CA 94043
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Synopsys and Varian Collaborate on Process Models for Advanced Logic and Memory Technologies
New TCAD Sentaurus Models Address Cryogenic Ion Implantation for Leakage Reduction of Leading-edge Logic and Memory Devices MOUNTAIN VIEW, Calif. and GLOUCESTER, Mass. -- Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, and Varian Semiconductor Equipment Associates, Inc. (Nasdaq: VSEA), the leading producer of ion...
Read More »EDA Software optimizes multicore systems.
Using Platform Architect, designers of SoCs, chipsets, and systems can capture hardware/software performance models of multicore system architectures in early concept phase for performance measurement and trade-off analysis, prior to software availability. Multicore Optimization Technology enables users to create task-driven workload models of end-product application, known as task-graphs,...
Read More »Latest Release of Synopsys IC Compiler Delivers Faster Design Closure
New Advances Include Faster Performance, Top-level Closure and DRC Repair MOUNTAIN VIEW, Calif., -- Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today announced the availability of the latest release of IC Compiler, a key component of the Galaxy(TM) Implementation Platform. This development caps a year of leading...
Read More »EDA Software addresses Gigascale design.
Facilitating large-scale IC design, Galaxy(TM) Implementation Platform 2010.12 includes Design Compiler-® Graphical with IC Compiler, which provides RTL-to-physical convergence from initial design exploration through concurrent multi-corner/multi-mode optimization. IC Compiler's Zroute technology offers concurrent design for manufacturability routing. Coupled with In-Design physical verification...
Read More »PHY Compiler facilitates integration of memory interface IP.
Supporting DDR2, DDR3, LPDDR, and LPDDR2 SDRAMs, DesignWare-® DDR PHY Compiler offers web-based GUI to assemble customized DDR PHY for system-on-chips. Compiler evaluates more than 60 variables and allows evaluation of unlimited what-if scenarios. After guiding user through series of decisions as they construct DDR PHY from hard IP components, compiler produces viewable image of DDR PHY layout,...
Read More »Synopsys Announces Android Operating System Support for DesignWare ARC Processor Cores
Android Support for High-performance DesignWare ARC 750D Processor Addresses the Needs of Low Power, Cost-Sensitive Portable and Consumer Applications MOUNTAIN VIEW, Calif.-- Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today announced Android operating system (v2.2 FroYo) support for the DesignWare(TM) ARC(TM) 750D...
Read More »EDA Software targets common platform 28-nm high-k metal gate technology.
Lynx Design System, featuring Galaxy(TM) Implementation Platform-enabled flow with DesignWare-® Interface IP, is pre-validated with ARM Artisan(TM) Physical IP and ARM Cortex(TM)-A9 processor. Integrated material science, mobile multimedia implementation, and SoC design practices lower risks for smart mobile device development. Foundry-Ready System technology plug-in, pre-validated for Common...
Read More »Media Advisory/Alert: Synopsys Showcases DesignWare Sonic Focus, Arc Processor Cores and MIPI IP at CES 2011
LAS VEGAS -- Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, will showcase its latest DesignWare-® IP at CES 2011 in Las Vegas, Nevada. See live demonstrations of the DesignWare ARC(TM) configurable processor cores, Sonic Focus-® audio post-processing IP, and MIPI CSI-2 IP and speak with our product experts. As a trusted...
Read More »Audio Post-Processing IP targets low-power, DSP-based electronics.
DesignWare(TM) Sonic Focus(TM) Stereo IP enables high-quality sound to be delivered through small speakers and targets low-power, portable devices. Suiting tethered stereo devices, DesignWare Sonic Focus Stereo HD IP delivers high-performance virtual surround sound for these products. Software utilizes multichannel algorithms and restores audio fidelity obscured by compression. It is controlled...
Read More »Host Controller IP aids development of mobile device displays.
DesignWare-® IP for Mobile Industry Processor Interface (MIPI-®) Display Serial Interface (DSI) Host Controller enables designers to incorporate display subsystems into mobile devices through standard interface. It can support up to 4 data lanes at speeds of up to 1 Gbps of data/lane. Supporting resolutions from 160 x 120 to 1,024 x 768, with configurable virtual channels, unit interfaces to...
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