Mountain View, CA 94043
Verification IP targets enterprise storage systems.
Delivering comprehensive VIP solution for all SAS designs including 24G standard, Synopsys VC VIP for SAS- enables system-on-chip teams to accelerate verification closure. Product uses SystemVerilog, UVM-compliant interface for integration into verification environments and for optimal performance. Synopsys VIP is capable of switching speed configurations dynamically at run time and includes...Read More »
EDA Software designs photonic components and systems.
With RSoft™ Photonic System Design Suite v2015.12, design and fabrication of silicon photonics, photonic integrated circuits, and optical transceivers is accelerated. Suite includes OptSim™ DSP library, which supports transceiver design and bit-error-rate estimation. ModeSYS™ tool includes model that combines multiple CW signals at same wavelength into single spatial field profile. Software...Read More »
Synopsys and ARM Expand Collaboration to Accelerate Software Development for ARM-based Designs
Collaboration Provides Synopsys with Access to the Latest ARM-® Fast Models for Use with Virtualizer Development Kits MOUNTAIN VIEW, Calif. Highlights: - - - --- New agreement builds on successful multi-year virtual prototyping - - - - - - - partnership and enables access to the latest ARM Fast models, including - - - - - - - the recently announced ARM Cortex-®-A35...Read More »
Processor Cores offer security package option.
Available for DesignWare-® ARC-® EM Processors, Enhanced Security Package option enables designers to create isolated, secure environment that protects systems and software from evolving security threats such as IP theft and remote attacks. Synopsys SecureShield™ technology provides support for separating secure and non-secure modes of operation and memory as part of trusted execution...Read More »
Synopsys Demonstrates Industry's First MIPI D-PHY IP Operating at 2.5 Gbps per Lane on TSMC 16-nm FinFET Plus Process
Demonstration Validates Performance and Compliance of DesignWare MIPI D-PHY for Low-Risk Integration into Mobile SoCs MOUNTAIN VIEW, Calif. - Highlights: - - - --- Industry's first demonstration to be unveiled at the MIPI-® Alliance - - - - - - - Open and Demo Day in Taipei, October 29, 2015 - - - --- Synopsys' silicon-proven, compliant D-PHYSM v1.2 on 16FF+ technology...Read More »
FPGA-Based Prototyping System delivers 100 MHz max performance.
HAPS-®-80 FPGA-Based Prototyping Systems deliver up to 100 MHz multi-FPGA performance and high-speed time-domain multiplexing (HSTDM) technology. Along with ProtoCompiler design automation and debug software, solution uses Xilinx Virtex UltraScale VU440 devices with 26-million-ASIC-gates capacity per FPGA; designs up to 1.6 billion ASIC gates are supported. Components accelerate software...Read More »
TSMC Certifies Synopsys' IC Compiler II on 10-nanometer FinFET Process
Collaboration Delivers Tool Enablement for Mutual Customers MOUNTAIN VIEW, Calif., - Synopsys, Inc. (Nasdaq:SNPS) today announced that TSMC has certified its IC Compiler™ II place and route product for V0.9 of 10-nanometer (nm) FinFET process technology (N10FF), and are on track to work towards V1.0 completion in Q4, 2015. IC Compiler II is the successor to IC Compiler, the place and route...Read More »
Digital Signal Processors support IoT applications.
Implementing enhanced version of ARCv2DSP instruction set architecture, DesignWare-® ARC-® EM9D and EM11D Processors combine RISC and DSP processing with support for XY memory system. Devices enable sustained throughput of one 32 x 32 MAC operation or two 16 x 16 MAC operations per clock cycle with minimal energy and area overhead. Processors also- support full integer, fractional divide, and...Read More »
Synopsys' IC Validator Distributed Processing Accelerates Signoff Physical Verification of Mellanox Design
IC Validator Delivers Near-Linear Distributed Processing Scalability MOUNTAIN VIEW, Calif. - Highlights: - - - --- IC Validator used for full foundry signoff DRC, LVS and DFM verification - - - --- Delivered near-linear distributed processing scaling on 100+ - - - - - - - million-instance design - - - --- Included customized DFM rule verification for added reliability...Read More »
USB IP Solutions integrate Type-C functionality.
Based on DesignWare USB PHY architectures in 28 nm and 14/16 nm FinFET silicon, DesignWare-® USB-C PHYs support USB Type-C™ (USB-C™) connectivity specification. Design reduces BOM by eliminating need for discrete multiplexers and crossbar switch components. While DesignWare USB-C 3.1 PHY offers 10 Gbps and 5 Gbps data transfer rates and consumesRead More »