Synopsys, Inc.

Software

New CXL 2.0 VIP Software Designed for Data-Intensive SoCs

Features built-in coverage, verification planning, and memory-aware debug and performance analysis. Uses SystemVerilog Universal Verification Methodology (UVM) architecture that enables ease of integration within existing verification environments. Supporrts all three CXL protocols (CXL.io, CXL.cache, CXL.mem) and device types to meet specific application requirements.

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Latest Virtualizer Development Kit is Ideal for Automotive Companies
Software

Latest Virtualizer Development Kit is Ideal for Automotive Companies

Supports Infineon's AURIX TC4xx 32-bit microcontroller with parallel processing unit. Enables early investigation and testing of algorithm implementations for AI and deep learning solutions. Provides external communication, co-simulation and debug/test interfaces for software debugging, virtual hardware-in-the-loop testing, and calibration and fault testing.

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Software

Synopsys Demonstrates Industry's First PCI Express 5.0 IP Interoperability with Intel's Future Xeon Scalable Processor

Successful Interoperability Enables Low-Risk Integration and Broad Adoption of the PCIe 5.0 Interface in High-Performance Computing SoCs MOUNTAIN VIEW, Calif., Oct. 13, 2020 /PRNewswire/ -- Highlights: Interoperability establishes end-to-end 32GT/s PCIe 5.0 link between DesignWare IP for PCI Express 5.0 Complete Solution and future Intel Xeon Scalable processors The DesignWare IP for PCI...

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Computer Hardware & Peripherals

New EM22FS Functional Safety Processor IP is ISO 26262 ASIL D Compliant

Offers integrated safety-critical hardware features such as dual-core lockstep, error-correcting code, and safety monitors, facilitate chip-level safety certification. Includes comprehensive safety documents such as failure modes, effects and diagnostic analysis (FMEDA), Safety Manual, Safety Case Report, ISO 26262 Functional Safety Assessment Report, and other safety-related documents. Developed...

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Synopsys ASIP Designer Tool has Ability to Export Processor's Simulation Model with SystemC Interfaces
Software

Synopsys ASIP Designer Tool has Ability to Export Processor's Simulation Model with SystemC Interfaces

ASIP Designer helps NSITEXE to optimize the processors multicore architecture and automatically generate software development kits. Allowed NSITEXE to specify the desired processor architecture in a high-level language at the abstraction level of a programmer's manual. Automatically configures the SDK containing a cycle-accurate instruction-set simulator, assembler, linker, debugger and C/C++...

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Software

Synopsys and Nestwave Collaborate to Develop a Low-power Geolocation IP Solution for IoT Modems

Combination of Synopsys' ARC IoT Communications IP Subsystem with Nestwave's Geolocation IP Eliminates the Need for a Dedicated Positioning Chipset Highlights: Nestwave's low-power geolocation solution incorporates Synopsys DesignWare ARC IoT Communications IP Subsystem with integrated ARC EM9D Processor IP ARC EM9D processor and custom instruction extensions provide performance...

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Software

New Integrated Solution Leverages Virtual Prototyping Technologies Including Virtualizer, Silver, TestWeaver and SaberRD

Support the needs of EV design which includes EV model libraries for power electronic, microcontrollers and AUTOSAR components. Enables more productive development and rapid scaling of test activities by removing the dependency on a physical hardware set up. Includes debug, analysis and test functionality to support functional safety, HW/SW debug, variation analysis, coverage analysis and...

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New JEDEC DDR5 Verification IP Uses Next-generation Native SystemVerilog UVM Architecture
Electrical Equipment & Systems

New JEDEC DDR5 Verification IP Uses Next-generation Native SystemVerilog UVM Architecture

Enables design and verification of next-generation memory devices with ease-of-use, fast integration and optimum performance, resulting in accelerated verification closure. Operates at up to 6400 Mb/s support key features of DDR5 standard including device size, burst length, DIMM topologies and RAS features. Ideal for broad range of enterprise applications including cloud, IoT, high-performance...

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New Design and Visualization Workflow Solution Features Photorealistic Renderings
Software

New Design and Visualization Workflow Solution Features Photorealistic Renderings

LucidShape CAA V5 enable designers to conceptualize and design automotive lighting products as well as generates physics-based photorealistic images. Help designers to create light guide designs fast, optimize light distributions and uniformity and achieve good as-built performance. Allow users to construct and simulate design variations fast as well as streamlines the creation of multiple design...

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Mergers & Acquisitions

Synopsys Acquires In-chip Monitoring Solutions Leader Moortec

Acquisition Expands Silicon Lifecycle Management Platform to Include Critical PVT Sensor Data for Greater Chip and System Optimizations MOUNTAIN VIEW, Calif., Nov. 11, 2020 /PRNewswire/ -- Synopsys, Inc. (NASDAQ: SNPS) today announced that it has acquired Moortec, a leading provider of in-chip monitoring technology specializing in process, voltage and temperature (PVT) sensors. The Moortec...

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Software

New CXL 2.0 VIP Software Designed for Data-Intensive SoCs

Features built-in coverage, verification planning, and memory-aware debug and performance analysis. Uses SystemVerilog Universal Verification Methodology (UVM) architecture that enables ease of integration within existing verification environments. Supporrts all three CXL protocols (CXL.io, CXL.cache, CXL.mem) and device types to meet specific application requirements.

Read More »
Company News

Synopsys Wins Multiple 2020 World Electronics Achievement Awards

DSO.ai Design Space Optimization System Named "Innovative Product of the Year" and VC SpyGlass RTL Static Signoff Solution Honored as "Most Promising Chip Life Technology" MOUNTAIN VIEW, Calif., Nov. 5, 2020 /PRNewswire/ -- Synopsys, Inc. (Nasdaq: SNPS) today announced it received two 2020 World Electronics Achievement Awards (WEAA): "Innovative Product of the Year" for DSO.ai™ (Design...

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Company News

Synopsys and Samsung Foundry Collaboration Delivers Optimized Reference Methodology for High-performance Compute Designs

Synopsys Fusion Design Platform Enables Full-Flow Quality-of-Results and Fastest Design Convergence on Samsung Advanced Process Technology Highlights: Synopsys and Samsung have collaborated on the enablement of Fusion Design Platform to unleash the benefits of Samsung's most advanced process nodes Certified flow provides designers a complete suite of industry-leading digital implementation...

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Latest Virtualizer Development Kit is Ideal for Automotive Companies
Software

Latest Virtualizer Development Kit is Ideal for Automotive Companies

Supports Infineon's AURIX TC4xx 32-bit microcontroller with parallel processing unit. Enables early investigation and testing of algorithm implementations for AI and deep learning solutions. Provides external communication, co-simulation and debug/test interfaces for software debugging, virtual hardware-in-the-loop testing, and calibration and fault testing.

Read More »
Company News

TSMC Recognizes Synopsys Collaboration with Four OIP Partner of The Year Awards for IP and EDA Solutions

Highlights: Synopsys selected as TSMC OIP Partner of the Year for interface IP and tool enablement for the 10th consecutive year Collaborations on interface IP, joint development of 3nm design infrastructure, 3DIC design productivity solution and a highly scalable timing sign-off in the cloud are recognized Mountain View, Calif., Oct. 20, 2020 /PRNewswire/ -- Synopsys, Inc. (Nasdaq: SNPS)...

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Company News

Synopsys and Samsung Foundry Announce Reference Flow for Predictable Execution of ASIL D-Compliant SoC Design for Automotive Applications

Comprehensive Flow Implements Synopsys' Functional Safety Processor IP for Efficient Development of Autonomous Driving and ADAS SoCs MOUNTAIN VIEW, Calif., Oct. 14, 2020 /PRNewswire/ -- Highlights: Samsung Foundry and Synopsys' optimized flow achieves predictable execution of in-system test, implementation, verification, timing and physical signoff for ASIL D-compliant SoC design...

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Software

Synopsys Demonstrates Industry's First PCI Express 5.0 IP Interoperability with Intel's Future Xeon Scalable Processor

Successful Interoperability Enables Low-Risk Integration and Broad Adoption of the PCIe 5.0 Interface in High-Performance Computing SoCs MOUNTAIN VIEW, Calif., Oct. 13, 2020 /PRNewswire/ -- Highlights: Interoperability establishes end-to-end 32GT/s PCIe 5.0 link between DesignWare IP for PCI Express 5.0 Complete Solution and future Intel Xeon Scalable processors The DesignWare IP for PCI...

Read More »
Computer Hardware & Peripherals

New EM22FS Functional Safety Processor IP is ISO 26262 ASIL D Compliant

Offers integrated safety-critical hardware features such as dual-core lockstep, error-correcting code, and safety monitors, facilitate chip-level safety certification. Includes comprehensive safety documents such as failure modes, effects and diagnostic analysis (FMEDA), Safety Manual, Safety Case Report, ISO 26262 Functional Safety Assessment Report, and other safety-related documents. Developed...

Read More »

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