VeriSilicon Holdings Co., Ltd.

Computer Hardware & Peripherals

VeriSilicon Announces ZSP G4 Architecture and ZSP981 Core

- An Innovative DSP with Optimal Performance, Power and Area for Advanced Wireless Technologies SHANGHAI - VeriSilicon Holdings Co., Ltd. (VeriSilicon), a leading Custom Silicon Solutions and Semiconductor IP provider, today announced the introduction of its fourth generation ZSP architecture (ZSP G4) and the availability of the ZSP981 Digital Signal Processor (DSP), the first core in the ZSP G4...

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Electrical Equipment & Systems

VeriSilicon Introduces Hantro G2 Video Decoder IP with HEVC and VP9 Support

World's first semiconductor IP to support both HEVC and VP9 video formats SHANGHAI - VeriSilicon Holdings Co., Ltd. (VeriSilicon), a leading custom silicon solutions and semiconductor IP provider, announced today the availability of Hantro G2 multi-format video decoder IP to support ultra HD 4K video decoding for HEVC (High Efficiency Video Coding, aka H.265) video coding standard. The G2 IP also...

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Communication Systems & Equipment

VeriSilicon Releases New Generation of Hantro Video IP Products to Promote WebM and WebRTC

SHANGHAI, -- VeriSilicon Holdings Co., Ltd. (VeriSilicon), a world-class, custom silicon solutions and semiconductor IP provider, announces immediate availability of Hantro G1v5 Multi-format Decoder and Hantro H1v5 Multi-format Encoder semiconductor IPs which support 4K x 4K video, achieved through core enhancements and improved memory latency resiliency up to 600 cycles. Both products are...

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Computer Hardware & Peripherals

Audio/Video Platforms accelerate portable multimedia design.

Supporting multiple portable video standards, VZ.Video lets SoC designers choose hardware video bundles for proper combination of decoding and encoding standards to meet application requirements. Solution requires 66 MHz system clock and less than 1 MIPS CPU loading to encode or decode at D1 resolution, 30 fps, 1.5 Mbps. Based on ZSP G1 architecture, VZ.Audio features 5 DSP core options from...

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Software

Software helps build applications for ZSP processors.

Software development environment for ZSP® architecture, ZView, incorporates Eclipse(TM) IDE to provide intuitive environment in which to build applications. Along with multi-processor debugging capability, program features assembler, linker, and debugger. It also provides options to use ZSP simulator models or ZSP hardware platforms including remote access to hardware via TCP/IP connection....

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Software

Design Platform is optimized for 0.13 µm low leakage process.

Standard Design Platform, optimized for SMIC's 0.13 Â-µm Low Leakage process, includes memory compilers for single- and dual-port SRAM, Diffusion programmable ROM, 2-port Register File Compiler, standard cell library, and I/O cell library. Technology can reduce IC power consumption for optimal use in battery powered applications. Platform supports EDA tools, including Cadence, Synopsys,...

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Test & Measurement

VeriSilicon Launches GSM-AMR-WB (G.722.2) Wideband Codec on ZSP® for 3G Wireless and VoIP Applications

G.722.2 Provides Higher Voice Communication Quality Than PSTN for Enterprise VoIP and Emerging IMS Systems SANTA CLARA, Calif., Aug. 7 / - VeriSilicon, a leading world class ASIC design foundry and semiconductor IP provider focusing on design and manufacturing services for customers worldwide, today announced the addition of GSM-AMR-WB (G.722.2) wideband codec to its Z.Voice portfolio of VoIP...

Read More »
Computer Hardware & Peripherals

VeriSilicon Announces ZSP G4 Architecture and ZSP981 Core

- An Innovative DSP with Optimal Performance, Power and Area for Advanced Wireless Technologies SHANGHAI - VeriSilicon Holdings Co., Ltd. (VeriSilicon), a leading Custom Silicon Solutions and Semiconductor IP provider, today announced the introduction of its fourth generation ZSP architecture (ZSP G4) and the availability of the ZSP981 Digital Signal Processor (DSP), the first core in the ZSP G4...

Read More »
Electrical Equipment & Systems

VeriSilicon Introduces Hantro G2 Video Decoder IP with HEVC and VP9 Support

World's first semiconductor IP to support both HEVC and VP9 video formats SHANGHAI - VeriSilicon Holdings Co., Ltd. (VeriSilicon), a leading custom silicon solutions and semiconductor IP provider, announced today the availability of Hantro G2 multi-format video decoder IP to support ultra HD 4K video decoding for HEVC (High Efficiency Video Coding, aka H.265) video coding standard. The G2 IP also...

Read More »
Communication Systems & Equipment

VeriSilicon Releases New Generation of Hantro Video IP Products to Promote WebM and WebRTC

SHANGHAI, -- VeriSilicon Holdings Co., Ltd. (VeriSilicon), a world-class, custom silicon solutions and semiconductor IP provider, announces immediate availability of Hantro G1v5 Multi-format Decoder and Hantro H1v5 Multi-format Encoder semiconductor IPs which support 4K x 4K video, achieved through core enhancements and improved memory latency resiliency up to 600 cycles. Both products are...

Read More »
Computer Hardware & Peripherals

Audio/Video Platforms accelerate portable multimedia design.

Supporting multiple portable video standards, VZ.Video lets SoC designers choose hardware video bundles for proper combination of decoding and encoding standards to meet application requirements. Solution requires 66 MHz system clock and less than 1 MIPS CPU loading to encode or decode at D1 resolution, 30 fps, 1.5 Mbps. Based on ZSP G1 architecture, VZ.Audio features 5 DSP core options from...

Read More »
Software

Software helps build applications for ZSP processors.

Software development environment for ZSP® architecture, ZView, incorporates Eclipse(TM) IDE to provide intuitive environment in which to build applications. Along with multi-processor debugging capability, program features assembler, linker, and debugger. It also provides options to use ZSP simulator models or ZSP hardware platforms including remote access to hardware via TCP/IP connection....

Read More »
Software

Design Platform is optimized for 0.13 µm low leakage process.

Standard Design Platform, optimized for SMIC's 0.13 Â-µm Low Leakage process, includes memory compilers for single- and dual-port SRAM, Diffusion programmable ROM, 2-port Register File Compiler, standard cell library, and I/O cell library. Technology can reduce IC power consumption for optimal use in battery powered applications. Platform supports EDA tools, including Cadence, Synopsys,...

Read More »
Test & Measurement

VeriSilicon Launches GSM-AMR-WB (G.722.2) Wideband Codec on ZSP® for 3G Wireless and VoIP Applications

G.722.2 Provides Higher Voice Communication Quality Than PSTN for Enterprise VoIP and Emerging IMS Systems SANTA CLARA, Calif., Aug. 7 / - VeriSilicon, a leading world class ASIC design foundry and semiconductor IP provider focusing on design and manufacturing services for customers worldwide, today announced the addition of GSM-AMR-WB (G.722.2) wideband codec to its Z.Voice portfolio of VoIP...

Read More »

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