Company News

CAST, Inc.

11-T Stonewall Ct., Woodcliff Lake, NJ, 07677, USA

  • 201-391-8300

Latest New Product News from
CAST, Inc.

Computer Hardware & Peripherals, Mechanical Components and Assemblies

Cache Controller IP Core augments 32-bit processors.

Sep 26, 2016

Supporting 4-way associative cache memory, CACHE-CTRL enables addition of single or multilevel cache memory to systems using cache-less 32-bit processors such as BA20 PipeLineZero™ or ARM® Cortex®-M0 processors. Controller uses standard AMBA® AHB processor and memory interfaces, and supports clock gating. When configured with 8 words per line and 256 lines per set (1024 lines in total),... Read More

Mechanical Components and Assemblies

Application-Level Interface Core aids PCIe FPGA integration.

Mar 25, 2011

IP core PCIEXPAIF provides high-level interface between system buses such as AMBA® AXI4 and PCI Express (PCIe) hard macro blocks available from FPGA vendors Altera and Xilinx. In addition to extensible DMA and other functions to encode and decode Transaction Layer Packets, core includes support for 32- and 64-bit versions of open source Wishbone Bus as well as AMBA® AHB(TM), AXI(TM), and AXI4... Read More

Communication Systems & Equipment, Mechanical Components and Assemblies

Main Profile Video Encoder Core leverages H.264 tools.

Feb 01, 2011

Optimized for video output quality and application support, H264-MP-E enables Full HD, 1920 x 1080p, 30 fps video in FPGAs and beyond 1920 x 1080p at 60 fps in ASICs. Hardware systems integration is facilitated by flexible, streaming-capable interfaces; stand-alone, processor-free operation; and low-bandwidth, latency-tolerant, external memory interface. Also, run-time tunable parameters and... Read More

Computer Hardware & Peripherals, Mechanical Components and Assemblies

DICOM-Compatible IP Core supports 8- and 12-bit JPEG.

Apr 21, 2010

Compact JPEG-E-X IP core supports both 8-bit Baseline and 12-bit Extended Sequential modes of JPEG image compression standard. Conformant to DICOM medical standard, unit compresses images from 8-12 bits per color sample, and also compresses non-standard motion JPEG streams. It can process 450 MS/sec with 69K gates in typical ASIC 0.09 micron process, 280 MS/sec in high-end FPGA devices, or 30 fps... Read More

Test & Measuring Instruments

System Library IP Package suits AMBA-based FPGAs and SoCs.

Aug 18, 2008

Compatible with various 32-bit processor cores, PiP-AMBA system infrastructure library provides all basics needed for systems built around de facto standard AMBA bus. It includes bus and peripherals IP cores plus drivers and other essential software, pre-integrated and pre-verified. Designers add memory, processor core, and any additional functions of their own to implement complete system. Basic... Read More

Computer Hardware & Peripherals

DSP Coprocessor adds math operations.

Jun 13, 2007

Designed for APS family of 32-bit processor IP cores, APS-DSP optimizes data handling to support multimedia and other demanding analog or mixed-signal applications. Fixed-point, 16-bit unit adds 3 arithmetic logic units operating in parallel, as well as 2 memory interfaces, and uses Harvard bus architecture for memory design. Bit-reverse arithmetic feature facilitates DSP calculations, while Zero... Read More

Communication Systems & Equipment, Mechanical Components and Assemblies, Sensors Monitors & Transducers, Test & Measuring Instruments

Encoder Core provides lossless image compression.

May 10, 2007

JPEGLS-E Encoder Core implements the ISO/IEC 14495-1 JPEG-LS standard, an algorithm designed to compress continuous tone color and grayscale images with lossless or near-lossless levels of quality. Featuring processing rate up to 161 Msamples/sec on an FPGA, it enables HDTV processing, and includes automatic and programmable features for system integration. Read More

Mechanical Components and Assemblies

Microprocessor Cores use RISC architecture in 32-bit design.

Jun 15, 2006

Requiring 18 µW, Models APS2 and APS3 are RISC designs with load/store architecture. They feature out-of-order instruction completion, fully vectored interrupts, programmable priority interrupt controller, and support for various peripherals and memory interfaces. Equipped with GNU Compiler Project tool set, processors are designed for high-level programming using C and C++. Tool set includes... Read More

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CAST, Inc.