Product News: Mechanical Components & Assemblies
Interconnect Fabric IP cuts SoC development time.
Press Release Summary:
January 23, 2014 - Embedded within FlexNoC interconnect IP fabric, FlexNoC Composition feature allows SoC architecture to be subdivided for implementation by various specialist design teams, each working independently on their own subsystem. Once all subsystems are complete, each can be integrated into one complete full chip-level FlexNoC interconnect fabric without requiring bridges. Unlike hybrid bus or crossbar, FlexNoC Composition re-connects each subsystem seamlessly through specialized low-latency protocol.
Original Press Release
Arteris Announces FlexNoC® Composition Features, Improving Design Flows and Cutting Design Time in Half
Press release date: January 16, 2014
FlexNoC Composition allows the SoC architecture to be subdivided for implementation by various specialist design teams, each working independently on their own subsystem. Once all subsystems are complete, each can be integrated into one complete full chip-level FlexNoC interconnect fabric without requiring bridges. FlexNoC Composition works for fully abutted and channeled floor plans. Unlike a hybrid bus or crossbar, FlexNoC Composition re-connects each subsystem seamlessly through a specialized low-latency protocol, Re-assembly is simple, regardless of revisions made to the IP block addressing, transaction protocols, or command sets during the development process. The chip verification process is also easier and faster. These features makes the development of a family of derivative chips to meet individual system OEMs' specific requirements a plug-and-play process.
"Arteris continues to advance network-on-chip technology with the FlexNoC Composition feature," said Jim McGregor, principal analyst at TIRIAS Research. "FlexNoC Composition should enable design teams to dramatically improve SoC design partitioning - speeding development time and increasing parallel subsystems."
"FlexNoC Composition is enabling chip companies to make more innovative chips - faster," said K. Charles Janac, President and CEO of Arteris. "While their first platform is ramping to volume, global design teams can quickly create derivatives, allowing companies to target other markets with application-specific features based on the original SoC platform. FlexNoC Composition truly reflects our vision for a plug-n-play interconnect fabric IP."
Arteris FlexNoC is the leading interconnect fabric IP chosen because it provides chip design teams with key advantages:
-- Accelerated time-to-market through shorter design cycles
-- Reduced die size and cost of chips
-- Ability to produce multiple chip derivatives based on a common SoC platform
-- Greater interconnect speeds and lower interface latency resulting in improved performance
-- Reduced power consumption due to advanced clock and power management features, and fewer gates and wires
Arteris, Inc. provides Network-on-Chip interconnect IP and tools to accelerate System-on-Chip semiconductor (SoC) assembly for a wide range of applications. Rapid semiconductor designer adoption by customers such as Samsung, Altera, and Texas Instruments has resulted in Arteris being the only semiconductor IP company to be ranked in the Inc. 500 and Deloitte Technology Fast 500 lists in 2012 and 2013. Customer results obtained by using the Arteris product line include lower power, higher performance, more efficient design reuse and faster SoC development, leading to lower development and production costs. More information can be found at www.arteris.com.
Arteris, FlexNoC and the Arteris logo are trademarks of Arteris. All other product or service names are the property of their respective owners.