USB 2.0 High Speed PHY is available on LFoundry's 150 nm process.July 1, 2011 -
USBHS-PHY provides complete, mixed-signal transceiver macro-cell that implements USB 2.0 physical layer for host and device applications. Compliant with UTMI+ specification, solution features built-in self test, self calibration termination, and pull-up resistors for seamless operation. Compliant with all relevant layers of USB specification for High, Full, and Low Speeds, PHY also supports 3.3 V analog and 1.8 V digital core supplies, both with 10% of voltage tolerance.
Original Press release
Evatronix SA
ul. Przybyly 2
Bielsko Biala, ,
Poland
Evatronix Releases USB 2.0 High Speed PHY to Complement Its USB Offering
Mixed-signal IP joins the renowned digital IP cores for USB 2.0 devices and constitutes a fully operational solution for most recent technology nodes.
Evatronix SA, the leading provider of USB-IF certified solutions for USB 2.0 IP, announced today the introduction of a USB High Speed PHY IP that will complement the long-existing suite of USB 2.0 Device and Host controllers. Evatronix USB 2.0 PHY has already been silicon proven and guarantees compliance with all relevant layers of USB specification for High, Full and Low Speeds.
"With the release of our USB 2.0 PHY we passed next significant milestone in our strategy to offer complete front-to-back IP solutions," said Wojciech Sakowski, Evatronix CEO. "With over 10 years of experience in developing and supporting USB 2.0 solutions we can now seamlessly assist our customers in all their development stages from architectural concept to tape-out."
The Evatronix USBHS-PHY is a complete mixed-signal transceiver macro-cell that implements the USB 2.0 Physical Layer for Host and Device applications. It is compliant with the UTMI+ specification.
The Evatronix USBHS-PHY features a Built-in Self Test, self calibration termination and pull-up resistors for seamless operation. It also supports regular 3.3V analog and 1.8V digital core supplies, both with 10% of voltage tolerance. Numerous other features enable designers to tailor the USBHS-PHY to the needs of a particular application.
EVATRONIX USBHS-PHY AVAILABILITY
The Evatronix USBHS-PHY logic macro is available now on the LFoundry 150nm process with the possibility to port it to any technology node from 45 to 180nm.
ABOUT EVATRONIX
Evatronix develops digital and mixed-signal Intellectual Property (IP) cores with complementary software and supporting application environments. We embrace hardware, software and design services elements to assist our customers in all SoC development stages, from concept to tape-out. In 20 years of history, Evatronix provided over 500 licenses for 8051, USB, NAND Flash, SDIO and multimedia solutions. We are headquartered in Poland, and employ more than 90 people worldwide.
For more information please visit the company's web site at www.evatronix.com/ip
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