Tx/Rx Controllers and PHY IP support HDMI 1.4. February 1, 2010 -
Targeting DTV and home theater applications, DesignWare® HDMI(TM) IP solution supports features of HDMI 1.4 specification, including HEAC 3D formats, real-time content signaling, 4 K x 2 K resolution, and 10.2 Gbps aggregate bandwidth. HEAC block facilitates connectivity between internet-enabled digital home devices by enabling transfer of Ethernet and audio frames through single HDMI cable. Real-time content signaling enables TVs to automatically optimize picture setting with no user intervention.
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Original Press release
Synopsys, Inc.
700 E. Middlefield Rd.
Mountain View, CA, 94043 4033
USA
Synopsys Launches DesignWare HDMI 1.4 Tx/Rx Controller and PHY IP Solutions for 40-nm Process Technologies
IP Supports HDMI Ethernet and Audio Return Channel, 3D Formats, Real-Time Content Signaling, 4K x 2K Resolution Mode, and 10.2 Gbps Aggregate Bandwidth
MOUNTAIN VIEW, Calif., -- Highlights
-- Fully compliant with HDMI 1.4 and High-bandwidth Digital Content Protection (HDCP) 1.4 specifications
-- Support for all key features including HDMI Ethernet and Audio Return Channel (HEAC), 3D modes, 4K resolution, additional color spaces and more
-- Superior analog front end supporting up to 20 feet category 2-certified HDMI cables, while maintaining high performance
-- HDMI PHY IP available in more than 10 processes from 90-nm to 40-nm
Synopsys, Inc. (NASDAQ:SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today announced the availability of high-quality DesignWare® High-Definition Multimedia Interface (HDMI(TM)) 1.4 transmitter (Tx) and receiver (Rx) digital controllers and PHY IP solutions that are compliant to the standard specification. With full support for new features of the HDMI 1.4 specification including HEAC 3D formats, real-time content signaling, 4K x 2K resolution and 10.2 Gbps aggregate bandwidth, the DesignWare HDMI IP enables designers to quickly incorporate differentiated functionality into their digital TV (DTV) and home theater applications with less risk and improved time-to-market.
To view the multimedia assets associated with this release, please click: http://multivu.prnewswire.com/mnr/synopsys/42036
With designers incorporating networking capabilities in next-generation home entertainment devices, the HEAC block in the DesignWare HDMI 1.4 solution helps simplify the connectivity between internet-enabled digital home devices by enabling the transfer of Ethernet and audio frames through a single HDMI cable. The DesignWare IP for HDMI 1.4 also incorporates all 3D formats, which allows device manufacturers to heighten the viewing experience by supporting 3D techniques such as full side-by-side, half side-by-side and frame alternative. The real-time content signaling capability enables televisions to automatically optimize the picture setting with no user intervention. Support for 4K x 2K resolution delivers up to four times the resolution of 1080p, providing the same resolution as state-of-the-art digital cinema systems.
"With a strong focus on innovation, DisplayLink continues to incorporate the latest technologies into our leading network display products," said Jonathan Jeacocke, vice president of engineering at DisplayLink. "When we wanted to incorporate HDMI IP into our SoC, we turned to Synopsys to provide us with a silicon-proven IP solution that had all the required features. We knew that Synopsys, a trusted IP vendor, would be there to not only provide us with a high-quality product, but also the expert technical support if and when we needed it."
The DesignWare HDMI IP solution includes a comprehensive set of IP deliverables including baseline software drivers for system development, which help designers quickly embed this complex interface into next-generation multimedia system-on-chips (SoCs). Furthermore, the solution provides the following:
-- Compliance with HDMI and HDCP specifications with certification from the NXP HDMI authorized testing center and successful interoperability results from HDCP plugfest events.
-- A superior analog front end that supports up to 20 foot category 2-certified HDMI cables, while maintaining high performance.
-- Digital controllers delivered in configurable RTL allow designers to optimize gate count and power consumption by choosing only the features required in their application.
-- PHY offering low power consumption and small die area.
-- Numerous optional features such as HDCP encryption engine, audio formats, audio DMA engine and system-bus interfaces which help ease the integration effort.
-- System validation based on the Synopsys Confirma TM HAPS-51 rapid prototyping platform.
"HDMI is a rapidly evolving standard that continues to revolutionize digital home theater systems and other portable multimedia devices," said John Koeter, vice president of marketing for the Solutions Group at Synopsys. "Synopsys' DesignWare HDMI IP solutions have been adopted by major OEMs, semiconductor companies, IDMs and foundries worldwide. The availability of the DesignWare HDMI 1.4 digital controller and PHY IP further enables SoC designers and system integrators to introduce the latest features to the market rapidly and with less risk."
Availability
The DesignWare HDMI 1.4 Tx and Rx IP solution is available now. The HDMI PHY IP is available in more than 10 process technologies from 90-nanometers (nm) to 40-nm, and from leading foundries. For more information on DesignWare HDMI IP, please visit: http://synopsys.com/hdmi
About DesignWare IP
Synopsys is a leading provider of high-quality, silicon-proven interface and analog IP solutions for system-on-chip designs. Synopsys' broad IP portfolio delivers complete connectivity IP solutions consisting of controllers, PHY and verification IP for widely used protocols such as USB, PCI Express, DDR, SATA, HDMI and Ethernet. The analog IP family includes analog-to-digital converters, digital-to-analog converters, audio codecs, video analog front ends, touch screen controllers and more. In addition, Synopsys offers SystemC transaction-level models to build virtual platforms for rapid, pre-silicon software development. With a robust IP development methodology, extensive investment in quality and comprehensive technical support, Synopsys enables designers to accelerate time-to-market and reduce integration risk. For more information on DesignWare IP, visit: http://www.synopsys.com/designware.
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About Synopsys
Synopsys, Inc. (NASDAQ:SNPS) is a world leader in electronic design automation (EDA), supplying the global electronics market with the software, intellectual property (IP) and services used in semiconductor design, verification and manufacturing. Synopsys' comprehensive, integrated portfolio of implementation, verification, IP, manufacturing and field-programmable gate array (FPGA) solutions helps address the key challenges designers and manufacturers face today, such as power and yield management, software-to-silicon verification and time-to-results. These technology-leading solutions help give Synopsys customers a competitive edge in bringing the best products to market quickly while reducing costs and schedule risk. Synopsys is headquartered in Mountain View, California, and has more than 65 offices located throughout North America, Europe, Japan, Asia and India. Visit Synopsys online at http://www.synopsys.com/.
Synopsys, Confirma and DesignWare are registered trademarks or trademarks of Synopsys, Inc. Any other trademarks or registered trademarks mentioned in this release are the intellectual property of their respective owners.
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