Single Board Computers comply with OpenVPX VITA 65 standard.January 25, 2010 -
Utilizing 1.86 GHz Intel Core 2 Duo SL9400 processor and Intel® GS45 mobile class chipset, TR 501/36x 3U VPX-REDI SBC supports up to 8 GB DDR3-1066 soldered SDRAM. Board provides flexible PCIe OpenVPX backplane fabric interface that can be configured for several OpenVPX slot profiles from 8 x1 PCIe ports through to 1 x8 PCIe port. TP 501/36x supports, via P1 connector, dual Gigabit Ethernet ports, 2 USB 2.0 ports, 1 RS-232/422/485 port, and 2 Serial ATA300 interfaces.
(Archive News Story - Products mentioned in this Archive News Story may or may not be available from the manufacturer.)
Original Press release
Concurrent Technologies, Inc.
3840 Packard Road, Suite 130
Ann Arbor, MI, 48108
USA
High Performance, OpenVPX 3U VPX-REDI Board
Concurrent Technologies introduces a leading edge high performance 3U VPX-REDI single board computer based on Intel's latest dual-core processors. The TR 501/36x is designed to comply with the OpenVPX VITA 65 standard, and utilizes the 1.86 GHz Intel Core 2 Duo SL9400 processor and the Intel® GS45 mobile class chipset both from the Intel® embedded roadmap, ensuring long term availability. The board supports up to 8 Gbytes DDR3-1066 soldered SDRAM and a wide variety of I/O interfaces including an XMC site. The rugged conduction cooled variant, TR 501/36x RC, supports VPX REDI Type 1 Two Level Maintenance. The TR 501/36x provides a flexible PCI Express® (PCIe) OpenVPX backplane fabric interface that can be configured for several OpenVPX slot profiles from 8 x1 PCIe ports through to a 1 x8 PCIe port. This fabric flexibility makes the board well suited for both systems with direct wiring between slots on the backplane and for systems linked by a fabric switch card. An air-cooled pin-compatible VPX version is also available for non-rugged applications and bench development. The TR 501/36x 3U VPX REDI SBC is well suited to high performance rugged applications particularly within the defense, aerospace and security markets.
The TR 501/36x board supports the 1.86 GHz Intel Core 2 Duo SL9400 processor and offers a large last-level on-die cache (6 Mbytes), 1066 MHz Front Side Bus, Intel® Virtualization Technology, Intel® 64 Technology, and improved power management, plus new features and enhancements to the Intel® Core(TM) microarchitecture delivering increased instructions per clock. The Intel® Thermal Design Power (TDP) for the 45nm 1.86 GHz dual core processor is 17W giving a much improved performance per Watt when compared to earlier generations of processors. The Intel® GS45 Graphics Memory Controller Hub and Intel® ICH9M-E IO Controller Hub are used to complement the processor to achieve a low power, yet high performance core design. The board is suited for CPU intensive processing applications where the processor's dual cores can access up to 8 Gbytes of soldered dual channel DDR3-1066 SDRAM, with a peak bandwidth of up to 16 Gbytes/s.
In addition, the TP 501/36x supports, via the P1 connector, dual Gigabit Ethernet ports (or a Gigabit Ethernet plus a 1000 Base-BX port), two USB 2.0 ports, one RS-232/RS-422/RS-485 port and two Serial ATA300 interfaces. An XMC module can be fitted to the onboard XMC site within a single slot. The XMC interface supports a x4 PCI Express link and Pn6 XMC rear I/O to the P2 connector mapped out as P2w1-X24s+X8d+X12d. Also via the P2 connector the board supports analog graphics, up to 2048 x 1536 resolution. For embedded applications an optional onboard 4 Gbytes NAND Flash module is supported. Other features provided are a PC real-time clock, watchdog timer, long duration timer and three GPIO signals.
The VITA 46.0 compliant TR 501/36x air-cooled variant is suitable for non-rugged environments operating over a temperature range of 0°C to 55°C. The pin-compatible TR 501/36x RC is designed as a conduction-cooled board (to VITA 48.2) for rugged environments (to VITA 47 Class V3 vibration, Class OS2 shock) and operating over temperatures of -40°C to +85°C (to VITA 47 Class CC4) and at altitudes from -1,000 to 50,000 feet (-305 to 15,240 meters). For increased physical protection the TR 501/36x RC supports VPX REDI Type 1 Two Level Maintenance and is a 0.85-inch pitch unit (to VITA 48.2).
The VPX data plane interface is a configurable PCI Express® (PCIe) backplane fabric interface. The backplane fabric interface can be configured as 8 x1 PCIe ports, 2 x4 PCIe ports, 1 x4 and 4 x1 PCIe ports, or a 1 x8 PCIe port. All fabric configurations are compatible with OpenVPX slot profiles. By using one of the latest PCI Express switches the board supports PCI Express Gen 1 and Gen 2 as well as providing a 4 channel DMA engine for fast data block moves. Multiple TR 501/36x RC SBCs can be used on the same backplane (providing multi-processing) as the board also supports an option to set up link 1 in the fabric as a non-transparent bridge. The VPX control plane interface on the TR 501/36x RC can be configured as 2 x 10/100/1000Mbps Ethernet ports, or as a 10/100/1000Mbps Ethernet port plus a 1000Mbps IEEE802.3z SERDES (1000 Base-BX) port.
System management is provided to monitor board voltages and CPU temperature. This capability is provided via SM0-1 and SM2-3 on the P0 connector, using a System Management Controller and 8 Kbytes of non-volatile memory. Operational self-diagnostics are supported in the form of Built-In Test (BIT) including Power-on BIT (PBIT), Initiated BIT (IBIT) and Continuous BIT (CBIT).
For ease of integration the TR 501/36x VPX SBC and the TR 501/36x RC VPX REDI SBC supports many of today's leading operating systems, including Linux®, Windows® XP, Windows® XP Embedded, QNX and VxWorks®.
The OpenVPX standard defines the VPX Systems Specification, an architecture that manages and constrains module and backplane designs. The VPX Systems Specification includes the definition of pin-outs and sets interoperability points within VPX, while maintaining full compliance with the existing VPX specification.
More information:
send an E-Mail to: sales@gocct.com or visit the Contacting Concurrent Technologies page.
|
|
|
|
|
|
|
| 
