SerDes PHY IP Platform supports multiple standards.July 19, 2011 -
Operating at speeds up to 12.5 Gbps and at 7.2 mW per Gbps of power per channel in quad configuration, MS PHY IP Platform supports 10GBase-KR, CEI-11G, PCIe 3.0, and SATA 6G standards. Device features digital control for programming SerDes, digital calibration and trimming, plus adaptation functionality that adjusts to varied channel characteristics. Low power transmit driver is immune to supply noise, has programmable amplitude and slew rate, as well as multi-tap pre- and post-emphasis.
Original Press release
Gennum
4281 Harvester Rd.
Burlington, ON, L7L5M4
USA
Gennum Snowbush IP Group Launches New Multi-Standard PHY IP Platform on TSMC 28nm
High-Performance SerDes IP Platform Supports 10GBase-KR, CEI-11G, PCIe 3.0, SATA 6G and Other Key IO Standards Up to 12.5Gb/s
BURLINGTON, - Enabling semiconductor manufacturers to dramatically improve time-to-market and reduce design and manufacturing costs, the Gennum (TSX: GND) Snowbush IP group, a leader in high-speed serial interface IP (intellectual property), today announced the availability of its third generation of silicon-proven Multi-Standard (MS) PHY IP Platform on TSMC 28nm.
The new platform, which is capable of supporting a number of different high-speed serial standards, includes a number of architectural changes to improve performance while adjusting to the design challenges of the 28 nanometer node. The new MS PHY, operates at speeds up to 12.5Gb/s and at 7.2mw per Gb/s of power per channel in a quad configuration. The silicon footprint is small, while maintaining margin for yield.
"As a pioneer in configurable and programmable PHYs, Snowbush continues to provide TSMC with validated high-speed IP on advanced technologies such as this 28nm Multi-Standard PHY," said Kevin Walsh, Director of Marketing for Snowbush IP. "SOC developers are facing tremendous pressures to minimize costs, meet aggressive development schedules and deliver a highly differentiated product to the market. Our new multi-standard PHY IP platform is another example of how Snowbush provides proven IP that offers first-to-market value when configured to different standards."
Support for Multiple Standards
The Snowbush MS PHY IP operates at speeds ranging from 1Gb/s to over 12Gb/s. Supported standards include:
-- Ethernet for 10GBase-KR, BASE-R, XFI, RXAUI and XAUI
-- Optical Interface Forum (OIF) for CEI-11G and CEI6G
-- PCI-SIG for PCIe 3,2, and 1
-- USB 3.0
-- SATA and SAS at 1.5Gb/s, 3Gb/s and 6Gb/s and is positioned to handle the new emerging SATA standards at 12Gb/s
The new MS PHY features new digital control for programming the SerDes to support different standards. Digital calibration and trimming tune the performance of the PHY and adaptation functionality adjusts to varied channel characteristics to ensure the best quality of service on the link. Auto-negotiation and link training are provided for standards requiring those features.
In addition to exceeding the performance requirements of the targeted standards, the new Snowbush MS PHY is highly programmable and optimized for low power and minimal silicon footprint. The low power transmit driver is immune to supply noise while delivering amplitude and slew rate programmability as well as multi-tap pre- and post-emphasis. On the receive side, a best-in-class Continuous Time Linear Equalizer
(CTLE) with Automatic Gain Control (AGC) feeds a 5-tap Decision Feedback Equalizer (DFE) to minimize Inter Symbol Interference (ISI) and deliver optimized eye data. The MS PHY supports a number of different power management modes including allowing each lane to be powered-down independently.
A number of test and debug features are available including an on-chip EyeView-Scope-on-a-Chip(TM) eye monitor for accurate visibility of the input signal quality and performance of the equalization, Pseudo Random Bit Sequence (PRBS) generators/checkers with a User Defined pattern option, and jitter injection. AC JTAG is also available.
Silicon Availability
The MS PHY, Part Number SBMULT550T28HP11G, is available now for instantiation on SOC designs. For more information, please contact your Gennum Snowbush IP representative or visit www.snowbush.com.
About the Gennum Snowbush IP Group
The Gennum Snowbush IP group offers a team of interconnect specialists to design and deliver silicon-proven, high-speed serial interface IP. Comprising one of the industry's most robust, widely-deployed, production-tested and customizable family of IP cores, the Snowbush IP portfolio satisfies the needs of today's most demanding high-speed serial communication protocols and applications. The offering includes complete, integrated, PHY and controller solutions for standards like USB, PCI Express(® )and Serial ATA (SATA), and single and multi-standard SerDes for applications with data rates from 1 Gb/s to over 14 Gb/s. Gennum's Snowbush IP group is committed to supporting customers with diverse foundry and process requirements, offering IP cores for TSMC, UMC, Common Platform, and Fujitsu processes. For more information visit www.snowbush.com.
About Gennum
Gennum Corporation (TSX: GND) designs innovative semiconductor solutions and intellectual property (IP) cores for the world's most advanced consumer connectivity, enterprise, video broadcast and data communications products. Leveraging the company's proven optical, analog and mixed-signal products and IP, Gennum enables multimedia and data communications products to send and receive information without compromising the signal integrity. A recognized award-winner for advances in high definition (HD) broadcasting, Gennum is headquartered in Burlington, Canada, and has global design, research and development and sales offices in Canada, Germany, India, Japan, Korea, Mexico, Taiwan, the United States and the United Kingdom. www.gennum.com.
Snowbush IP, Gennum and related logos are trademarks of Gennum Corporation. All other product or service names are the property of their respective owners. Copyright Gennum Corporation, 2011.
|
|
|
|
|
|
|
| 
