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PCI Express Development Kit targets LatticeECP3(TM) FPGAs.

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April 29, 2010 - LatticeECP3 development kit features 4 key capabilities for rapid prototyping of PCI Express system design. Users can bring up running PCI Express hardware in 30 min minutes or less, and various demos address control plane through data plane performance requirements. Source files for demos enable rebuilding designs up to known good starting point, and kit enables a rapid transition to design exploration through the included software tools, IP enabled evaluation process, and project source directories.

(Archive News Story - Products mentioned in this Archive News Story may or may not be available from the manufacturer.)
Original Press release

Lattice Semiconductor Corp.
5555 N.E. Moore Court
Hillsboro, OR, 97124
USA



Lattice Accelerates PCI Express System Design with New Low Cost LatticeECP3 Development Kit


Users Typically Can Achieve Working PCI Express Hardware in Thirty Minutes, and a Known Good Starting Point for a Design in Less Than Two Hours

HILLSBORO, OR - Lattice Semiconductor (NASDAQ: LSCC) today announced the availability of a new low cost PCI Express development kit for its award winning LatticeECP3(TM) family of high value, low power FPGAs. Based on a new ECP3 PCI Express solutions board, the kit accelerates development of PCI Express designs. The kit has been developed from the ground up to accelerate the evaluation of Lattice PCI Express technology, demonstrate a range of solutions that match typical application requirements and speed users to design exploration. Lattice will demonstrate the LatticeECP3 PCI Express development kit at the 13th Embedded Systems Expo ("ESEC"), Booth 37-26, in Tokyo, Japan from May 12th to May 14th.

The new kit features four key capabilities for quick evaluation and rapid prototyping of low cost PCI Express system design. First, the kit enables users to bring up running PCI Express hardware in thirty minutes or less. Second, various demos included in the kit address control plane through data plane performance requirements. Third, source files for the demos are available that enable rebuilding designs up to a known good starting point. Finally, the kit enables a rapid transition to design exploration through the included software tools, IP enabled evaluation process and project source directories.

"The LatticeECP3 FPGA is an excellent low power, high value programmable platform for PCI Express," said Shakeel Peera, Lattice's Director of Strategic Marketing for High Density Solutions. "The new LatticeECP3 PCI Express development kit will help users reduce complexity and shrink the time-to-market window for their PCI Express designs."

About the LatticeECP3 PCI Express Development Kit

The LatticeECP3 PCI Express development kit offers several key features for rapid, low-cost PCI Express system design:

o An all-inclusive package that is optimized for creating a design with the low-power, low-cost LatticeECP3 FPGA family.

o A highly-optimized, low-cost PCI Express evaluation board that enables both x1 and x4 endpoint evaluation and design.

o A variety of demo executables - basic demo for control plane applications, throughput demo for high-bandwidth applications, color bar demo and an image transfer demo - that show how to address different design performance requirements.

o A 60 day software tools license and included x1/x4 endpoint IP core and scatter-gather DMA IP core permit users to get up and running right away.

o Available on both Windows and Linux platforms.

The components of the LatticeECP3 PCI Express development kit have been configured to work together to enable fast system evaluation and design. With the help of easy step-by-step instructions, designers can expect to have a demo running in as little as 30 minutes, and a design validated in less than two hours. For more information visit: www.latticesemi.com/products/d....

About the LatticeECP3 FPGA Family

The award winning LatticeECP3 FPGA family is comprised of five devices that offer standards-compliant multi-protocol 3.2G SERDES, DDR1/2/3 memory interfaces and high performance, cascadable DSP slices that are ideal for high performance RF, baseband and image signal processing. Toggling at 1Gbps, the LatticeECP3 FPGAs also feature the fastest LVDS I/O available in a mid-range FPGA family, as well as embedded memory of up to 6.8 Mbits. Logic density varies from 17K LUTs to 149K LUTs with up to 586 user I/O. The LatticeECP3 FPGA family is ideally suited for deployment in high volume cost- and power-sensitive wireline and wireless infrastructure applications, as well as security/surveillance, medical and industrial applications.

Pricing and Availability

The development kit is available now, with a list price of $895.00. The kit can be ordered through Lattice sales or through the Lattice on-line store at www.latticesemi.com/store/dev_kits.cfm.

About Lattice Semiconductor

Lattice is the source for innovative FPGA, PLD, programmable Power Management and Clock Management solutions. For more information, visit www.latticesemi.com

Lattice Semiconductor Corporation, Lattice (& design), L (& design), LatticeECP3 and specific product designations are either registered trademarks or trademarks of Lattice Semiconductor Corporation or its subsidiaries in the United States and/or other countries.

Other product names used in this publication are for identification purposes only and may be trademarks of their respective holders.

For more information contact:

Brian Kiernan, Corporate Communications Manager

Lattice Semiconductor Corporation

brian.kiernan@latticesemi.com

voice: (503) 268-8739

fax: (503) 268-8193
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