Memory Solution features space-saving stacked design.September 14, 2006 -
Designed for mobile phone applications, Package-on-Package (PoP) memory solution is available in 12 x 12 mm (128 balls) and 14 x 14 mm (152 balls) sizes, with 0.65 mm ball pitch. Bottom PoP package features array of metallic balls on underside and array of footprints (lands) on top surface to receive mating Top BGA package. Technique allows devices to be assembled in vertical stacks consisting of logic device with memory BGA package soldered on top.
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Original Press release
STMicroelectronics
10 Maguire Road
Lexington, MA, 02421
USA
STMicroelectronics Launches Package-on-Package Memory System Solutions for Mobile Applications
Latest packaging technology - dedicated to wireless applications - is now available as ST's memory portfolio evolves
Geneva, September 13,2006 - STMicroelectronics (NYSE: STM), a leading supplier of non-volatile memory (NVM) for mobile phones, today announced the availability of memory solutions using Package-on-Package (PoP) technology - a packaging development that makes significant board space savings for the high-density memory and complex processor combinations typically employed in high-end handsets.
The PoP structure allows two BGA (Ball Grid Array) packages to be stacked on top of each other: the Bottom PoP package features the normal array of metallic balls, or bumps, on the underside of the package, but also has an array of footprints (lands) on the top surface that are designed to receive a mating Top BGA package. Industry standards are being defined by the JEDEC association.
The technique enables devices to be assembled in a vertical stack consisting of a discrete logic device, such as a baseband or application processor, with a memory BGA package soldered on top. Standardized ballouts route signals between them. As well as saving space in the application, PoP offers great flexibility in component combinations and design,
In addition, manufacturers are able to source and test the typically complex memory system and logic device separately, simplifying assembly flow for high-performance mobile multimedia products. ST's PoP memory solutions will complement its existing MCP (Multi-Chip Package) portfolio - in which multiple chips are mounted in a single package to minimize the space requirement, increase memory density and provide combinations of different memory types - so improving choice for system designers.
"The use of PoP technology is gaining momentum with our partners," said William Vespi, Strategic Marketing, NOR Wireless Division, STMicroelectronics. "PoP technology perfectly matches demands for both flexibility and board miniaturization."
The first samples available for the market are 12x12mm (128 balls) and 14x14mm (152 balls) package sizes, with 0.65mm ball pitch. Both split bus and shared bus architectures are supported. A range of components can be selected for the PoP configuration, including NOR Flash, NAND Flash, PSRAM, LPSDRAM and LPDDRAM.
About STMicroelectronics
STMicroelectronics is a global leader in developing and delivering semiconductor solutions across the spectrum of microelectronics applications. An unrivalled combination of silicon and system expertise, manufacturing strength, Intellectual Property (IP) portfolio and strategic partners positions the Company at the forefront of System-on-Chip (SoC) technology and its products play a key role in enabling today's convergence markets. The Company's shares are traded on the New York Stock Exchange, on Euronext Paris and on the Milan Stock Exchange. In 2005, the Company's net revenues were $8.88 billion and net earnings were $266 million. Further information on ST can be found at www.st.com.
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