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FPGA IP Cores utilize lightweight compression technology.

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March 20, 2014 - Without any usage of external memory, TICO FPGA IP Cores provide lightweight, visually lossless, disruptive compression up to 4:1, with fixed latency of few pixel lines for HD, 4K, or 8K. Technology offers smart solution to increase number of streams or stream resolution that could be supported in multi-stream configuration; reduce internal video bandwidth in systems such as mobile devices, cameras, and displays; and increase storage or video/frame buffer capacity.

intoPIX Demonstrates First TICO Lightweight Compression Technology Running on FPGA Hardware at NAB 2014


intoPIX s.a
place de l'Université 16
Louvain-la-Neuve, Belgium



Press release date: March 19, 2014

BELGIUM, Mont-Saint-Guibert — At the upcoming NAB show, intoPIX (booth C5243) is showcasing the first hardware implementation of the TICO patent-pending lightweight disruptive compression technology running on FPGA. Without any usage of external memory and with an incredibly low footprint, TICO FPGA IP-cores provide a lightweight visually lossless compression up to 4:1, with a fixed latency of few pixel lines for HD, 4K or 8K. This new advanced image and video compression algorithm is designed to efficiently and invisibly tackle important cost and bandwidth challenges faced by our industry.

“Our industry needs smart ways to handle more HD streams and move to 4K or 8K with cost and power savings. It is not possible to increase storage, bandwidth and video buffer capacity everywhere,” says Gael Rouvroy, intoPIX Chief Technology Officer. “Using TICO lightweight compression in FPGA, we are able to achieve higher performance with lower cost infrastructure and systems. TICO is designed to be a standard for the industry-wide support and can easily map 4K video in 3G-SDI or 10GbE network for instance.”

The first ultra-low-footprint encoder and decoder (IPX-TC-UHD4K) that will be presented at NAB will compress any resolutions from HD up 4K resolution at 60 FPS with lossless visual quality up to 4:1 at a maximum latency of 8 pixel lines. A second lightweight IP-core version will perform mathematically lossless video frame buffer compression-decompression (IPX-TC-MLS): given that image resolutions continue to increase and more image data need to be transferred, bandwidth reduction is becoming a very important issue in video processing.

The NAB demonstrations feature a Xilinx Kintex-7- board and an Altera Cyclone V board running the current FPGA development of the TICO technology. intoPIX welcomes everybody at its booth to discover the new TICO compression and enjoy the first FPGA and technology demos.

About intoPIX
intoPIX is a leading supplier of  video and image compression technology to audiovisual equipment manufacturers. We are passionate about offering people a higher quality image experience and have developed FPGA IP-cores and solutions that enable leading-edge video and image compression, security and hardware enforcement. More product information about TICO compression can be found on www.intopix.com/TICO
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