EDA Software accelerates analog/mixed-signal engineering.April 13, 2010 -
Galaxy Custom Designer(TM) incorporates SmartDRD design-rules-driven technology, which enables layout engineers to achieve design-rule-check (DRC) clean designs with reduced effort via automated repair tasks. Comprised of DRDAutoFix and DRDVisual, SmartDRD technology assists layout engineers during manual placement and routing by automatically bringing edited design into rule compliance. Functionality lets layout engineers identify and fix DRC violations in seconds.
(Archive News Story - Products mentioned in this Archive News Story may or may not be available from the manufacturer.)
Original Press release
Synopsys, Inc.
700 E. Middlefield Rd.
Mountain View, CA, 94043 4033
USA
Synopsys Galaxy Custom Designer Accelerates Analog/Mixed-Signal Engineering Productivity with Built-in DRC Visualization and Correction
New SmartDRD Technology Brings Automation to Custom Layout Design Rule Checking
MOUNTAIN VIEW, Calif. -- Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today announced that it has enhanced its Galaxy Custom Designer(TM) solution with the addition of SmartDRD, an innovative design-rules-driven technology. SmartDRD technology enables layout engineers to more quickly achieve design-rule-check (DRC) clean designs with significantly reduced effort for analog and custom designs. SmartDRD automates many DRC repair tasks, reducing hours of manual effort to mere seconds.
Driven by the need to manage increasing design complexity and ever-growing design rule counts and their interrelationships, SmartDRD was architected to reduce a substantial bottleneck in layout implementation. Until now, layout engineers have had to remember and accommodate all design rules without negatively impacting schedules. The powerful SmartDRD technology is designed to assist layout engineers during manual placement and routing by automatically bringing an edited design into rule compliance.
"DRC correction in custom layout is a difficult and time-consuming activity, and we often have to go through multiple iterations to fix all errors," said Ebi Abedifard, vice president of engineering at Avalanche Technology. "Bringing automation to this task will help increase engineering productivity and eliminate a tedious step in getting the layout finalized."
Custom Designer SmartDRD technology helps engineers achieve faster final physical verification and quicker time-to-tapeout. It includes:
DRDAutoFix--Designed to automatically correct DRC violations. Developed around an interactive and incremental use model, DRDAutoFix allows the layout engineer to specify an area of a design for repair. DRDAutoFix automatically modifies that area of the design while keeping track of the design rules and their interrelationships to bring the design into rule compliance.
DRDVisual--Designed to graphically show correct DRC spacing for wires and objects in real-time. Driven from the design rules in the OpenAccess technology file, DRDVisual provides dynamic highlighting that guides the engineer towards correct manual placement.
"Our new SmartDRD technology brings automation to an area of custom layout that until now has been primarily handled using painstakingly manual methods," said Farhad Hayat, senior director of marketing for Synopsys' Analog and Mixed-Signal Group. "By taking advantage of SmartDRD technology, layout engineers can identify and fix DRC violations in just seconds, significantly increasing their productivity without compromising quality of results."
DRDAutoFix and DRDVisual are available now in the 2009.12 release of Custom Designer. To see SmartDRD in action, attend the "Custom Designer: Advances in Custom Layout Automation with SmartDRD" webinar premiering on March 23, 2010. The webinar will continue to be available online after the premiere for convenient viewing at any time.
About Synopsys
Synopsys, Inc. (Nasdaq: SNPS) is a world leader in electronic design automation (EDA), supplying the global electronics market with the software, intellectual property (IP) and services used in semiconductor design, verification and manufacturing. Synopsys' comprehensive, integrated portfolio of implementation, verification, IP, manufacturing and field-programmable gate array (FPGA) solutions helps address the key challenges designers and manufacturers face today, such as power and yield management, software-to-silicon verification and time-to-results. These technology-leading solutions help give Synopsys customers a competitive edge in bringing the best products to market quickly while reducing costs and schedule risk. Synopsys is headquartered in Mountain View, California, and has more than 65 offices located throughout North America, Europe, Japan, Asia and India. Visit Synopsys online at http://www.synopsys.com.
Synopsys and Galaxy Custom Designer are registered trademarks or trademarks of Synopsys, Inc. Any other trademarks or registered trademarks mentioned in this release are the intellectual property of their respective owners.
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