ASIC cuts power consumption of portable devices.January 24, 2007 -
Utilizing 55 nm UX7LS process technology, cell-based CB-55L offers high-density design that accommodates 925,000 gates/mm². Operating from 1.0-1.2 V, unit consumes approximately 1.7 nW/MHz/gate with delay time of 11.8 ps and max I/O of 2,800, depending on packaging. ASIC is suited for portable battery-operated devices such as digital still cameras and digital video cameras.
(Archive News Story - Products mentioned in this Archive News Story may or may not be available from the manufacturer.)
Original Press release
NEC Electronics
2880 Scott Blvd.
Santa Clara, CA, 95050
USA
NEC Electronics Introduces 55-nanometer Cell-Based IC
Advanced CB-55L ASIC Significantly Reduces Power Consumption of Portable Devices
KAWASAKI, Japan, DUESSELDORF, Germany, and SANTA CLARA, Calif., Jan. 18 /-- NEC Electronics today introduced CB-55L, a cell-based integrated circuit (CBIC) that utilizes the company's 55-nanometer (nm) UX7LS process technology. The latest addition to NEC Electronics' ASIC lineup has superior power consumption characteristics, demonstrating a 40 percent reduction in power consumption from the previous 90-nanometer CB-90M. CB-55L also offers more than double the density of previous devices, and offers very high reliability by resolving parameter variations often encountered at advanced process technology nodes. This combination of features makes the CB- 55L ideal for portable battery-operated devices such as digital still cameras and digital video cameras, which have stringent power consumption requirements.
The main features of CB-55L are as follows:
(1) Low power consumption
CB-55L is based on NEC Electronics' advanced UX7LS CMOS process technology, the first 55-nm process in the world to utilize a high-k dielectric, which reduces leakage current and improves power consumption by 40 percent over previous 90-nm devices.
(2) High density
The use of leading edge 55-nm process technology makes it possible to increase density by 230 percent, fitting 925,000 gates per square millimeter.
(3) High reliability
Implementation of design for manufacturing (DFM) techniques such as on-line/on-the-grid layout prevents excessive parameter variations and refines the manufacturing process, ensuring smooth product rollout and delivery.
(4) Reduced turnaround times (TAT)
Statistical STA and other cutting edge support optimized for 55-nm designs help significantly reduce TAT.
(5) Comprehensive IP library optimized for portable devices
The company will provide comprehensive IP macros such as USB2.0, JPEG, DDR/DDR2 required for digital cameras, camcorders, and other battery-operated applications, as well as commodity IP including PLLs, A/D converters, and D/A converters.
NEC Electronics has been a leader in CBICs using advanced manufacturing processes. It first introduced the 90-nm CB-90 series in November 2002, which has been industry-proven in numerous personal computers and communications equipment. The company has also steadily developed its process technology, introducing its 55-nm UX7LS process in December 2005. The company is currently readying UX7LS for volume production and developing macros based on the process.
CB-55L follows in the distinguished footsteps of NEC Electronics' previous research and development, but it marks a departure from the company's previous CBIC strategy, which addressed a wide range of markets. To optimize allocation of resources, support for CB-55L designs will initially be limited to manufacturers of digital cameras and other portable devices.
Pricing and Availability
NEC Electronics has completed development of CB-55L and is now accepting orders. Libraries will be available in March 2007.
For more information on CB-55L and NEC Electronics' complete lineup of cell-based IC offerings, please visit http://www.necel.com/cbic/en/index.html
CB-55L Specifications and IP
Process 50-nm gate length silicon gate CMOS,
All-Cu interconnects 6-layer / 7-layer
Max. available gates 100 million
Max. I/O 2800 *
Power supply voltage Internal: 1.0 - 1.2V
I/O: 1.8V/2.5V/3.3V
Power consumption Approx. 1.7 nW/MHz/gate
Delay time 11.8 ps (2NAND,FO=2)
Memory macro Single/dual/multi-port SRAM
ROM
Register file
Interface 1.8V/2.5V/3.3V interface
Low noise buffer
High-speed interface (LVDS, SubLVDS, SSTL2,
SSTL18 et. al.)
IP cores PLL, A/D converter, D/A converter,
USB2.0, JPEG, DDR/DDR2 SDRAM interface,
CPU, SDIO interface, etc.
Packaging FPBGA, PBGA, FCBGA
* Depends on packaging.
About NEC Electronics
NEC Electronics Corporation specializes in semiconductor products encompassing advanced technology solutions for the high-end computing and broadband networking markets, system solutions for the mobile handset, PC peripherals, automotive and digital consumer markets, and platform solutions for a wide range of customer applications. NEC Electronics Corporation has 24 subsidiaries worldwide including NEC Electronics America, Inc. ( http://www.am.necel.com/ ) and NEC Electronics (Europe) GmbH ( http://www.eu.necel.com/ ). For additional information about NEC Electronics worldwide, visit http://www.necel.com/ .
CONTACT: Japan / Asia, Sophie Yamamoto, NEC Electronics Corporation, +81 44-435-1676, or sophie.yamamoto@necel.com; or Americas, Klaudeen Shemirani, NEC Electronics America, +1 408-588-5402, or klaudeen.shemirani@am.necel.com; or Europe, Oliver Luettgen, NEC Electronics Europe, + 49-211-6503-1469, or oliver.luettgen@eu.necel.com
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