Quantcast
 
Search for: Search what?
Feb 10, 2010  
 Sections
Latest New Product News
Industry Market Trends
Green & Clean News
Association & Government News
Adhesives and Sealants
Agricultural and Farming Products
Architectural and Civil Engineering Products
Automatic ID
Chemical Processing and Waste Management
Cleaning Products and Equipment
Communication Systems and Equipment
Computer Hardware and Peripherals
Construction Equipment and Supplies
Controls and Controllers
Display and Presentation Equipment
Electrical Equipment and Systems
Electronic Components and Devices
Explosives, Armaments and Weaponry
Fasteners and Hardware
Fluid and Gas Flow Equipment
Food Processing and Preparation
Health, Medical and Dental Supplies and Equipment
HVAC
Labels, Tags, Signage and Equipment
Laboratory and Research Supplies and Equipment
Lubricants
Machinery and Machining Tools
Material Handling and Storage
Materials and Material Processing
Mechanical Components and Assemblies
Mechanical Power Transmission
Mining, Oil Drilling & Refining
Mounting and Attaching Products
Non-Industrial Products
Optics and Photonics
Packaging Products & Equipment
Paints and Coatings
Plant Furnishings and Accessories
Portable Tools
Printing and Duplicating Equipment
Retail and Sales Equipment
Robotics
Safety and Security Equipment
Sensors, Monitors and Transducers
Services
Software
Test and Measuring Instruments
Textile Industry Products
Thermal and Heating Equipment
Timers and Clocks
Transportation Industry Products
Vision Systems
Waste Handling Equipment
Welding Equipment and Supplies
 Press Releases
Products in the News
Company News
Mergers & Acquisitions
People in the News
Literature & Websites
 Resources
News Delivery Options
Browse Categories
Browse Companies
Mobile Edition
PR Resources
Licensing
Advertising
How to Write an effective Press Release
Trade Associations
Small Business Support
MEP
Advertisement
Download ISO 9001 Standards

STA Software has quad-core licensing as standard feature.


March 20, 2009 - PrimeTime® STA suite v2008.12 includes multicore processing technology that makes effective use of both single-core and multicore CPUs across compute server farms. It features runtime optimizations, allowing design engineers to run full timing and SI analysis on their large designs, early in implementation process. Software's multicore capability works seamlessly with job scheduling systems such as LSF and Grid Computing Solutions.

 See related product stories
Design Verification Software provides PCIe 3.0 protocol testing.
Automatic Verification Software targets complex SoC designs.
USB 3.0 Protocol Analyzer delivers graphical debug solution.
DTV Development Platform simplifies product differentiation,
System-Level Library features SuperSpeed USB 3.0 support.
 See more product news in:
Software
 Tools for you
del.icio.us DIGG  
Facebook Reddit
StumbleUpon Twitter
Print This Page E-Mail Story
Watch_Company  Save Story
Contact company View Company Profile
Company web site 
More news from this company

Advertisement
More Tools and information
Search for suppliers of
Electronic Design Automation (EDA) Software
Join the forum discussion at:
 Engineers Lounge
 Newsletters
Your Gateway to a Fast Changing World
Product News Alerts
Receive similar stories and other customized news to keep you in the know on the products shaping industry.
Subscribe Free Today
Subscribe   View Sample

Industry Market Trends
Has Got It
  • Latest developments
  • Trends
  • Best practices
  • Opinions & Commentary
Get Ahead. Get IMT.
Subscribe Free Today
Subscribe   View Sample
 See more related product stories:
EDA Software addresses signoff bottlenecks.
Simulation Software enables large-scale radiating studies.
Compliance Test Software targets USB 3.0 protocol.
EDA Software facilitates RFIC simulation and analysis.
Engineering Simulation Software accelerates product design.
Broadcast Connectivity Platform simplifies digital interface development.
FPGA Design Software supports high-speed DDR interfaces.
Channel Simulator Software includes bit-error-rate detection.
Simulation Library helps algorithm, hardware developers.
EDA Software suits pin-limited semiconductor testing.
PHY IP supports 28 nm processes in 1.8 V architecture.
PCB Design Prototyping Software accelerates board development.
Design and Verification Software offers S-Parameter support.
PCB Design Software combines board-level and hardware design.
Electrical Engineering Software aids wiring design and layout.
PCB Design Software focuses on ease of use and quality.
Electronic Design Automation Software facilitates, accelerates ASIC/FPGA development.
IC Design Software provides custom parasitic extraction solution.
Development Board enables prototyping of electronic designs.
Functional Verificaton Software ensures X-robust designs.


Synopsys Delivers Multicore Support with the Latest PrimeTime Release


Flexible Multicore Processing Unlocks Compute Potential of Today's Server Farms

MOUNTAIN VIEW, Calif., Feb. 12 -- Synopsys, Inc. (NASDAQ:SNPS), a world leader in software and IP for semiconductor design and manufacturing, today unveiled two key improvements to its PrimeTime® static timing analysis (STA) suite that deliver a dramatic boost to designer productivity. The latest release includes a flexible multicore processing technology that makes more effective use of both single-core and multicore CPUs across today's compute server farms, harnessing their compute potential. This release also introduces new runtime optimizations, allowing design engineers to run faster full timing and signal integrity (SI) analysis on their large designs early in the implementation process, thus reducing costly design closure iterations. These improvements work in concert to deliver up to 2X faster runtime and have been confirmed on a suite of leading semiconductor companies' designs ranging in size from one million to 50 million instances.

"We worked closely with Synopsys to achieve significant runtime improvements with PrimeTime over the last several releases," said Senthil Krishnasamy, director of Physical Design, AMD. "We are encouraged by the initial results of the new PrimeTime multicore feature, and look forward to deploying it to accelerate the STA analysis of our large designs by more fully utilizing the potential of Quad-Core AMD Opteron(TM) processors in our silicon design process."

In today's design environment, the typical compute server farm is comprised of a mix of legacy single-core and newer multicore CPU machines. Access to these heterogeneous resources is typically provided through job scheduling systems that help ensure the most efficient allocation based on dynamically-changing, enterprise-wide compute needs. During periods of high activity in the farm, the wait time for available multicore machines can far outweigh the runtime speed-up gained by multicore acceleration. Synopsys' multicore capability in PrimeTime 2008.12 helps provide the flexibility to utilize any idle CPU core resource, on any machine in the farm. This enables multicore acceleration without the multicore machine access time penalty, which means more timing analysis jobs completed faster and more efficiently.

"At RMI, time-to-market is mission critical for our platform of high-performance multi-core multi-threaded SoC processors," said Ramon Macias, director of physical design, RMI. "In order to achieve fast design closure on our latest multi-million instance 40-nanometer design, we need to run signal integrity analysis early in our design implementation phase to minimize ECOs during signoff. The latest runtime optimizations in PrimeTime SI combined with multicore CPU support has improved our runtimes by 1.5 to 1.8X."

Design teams targeting the latest silicon process technology nodes see a significant productivity benefit when they incorporate SI analysis early in their design implementation phase. Waiting until timing signoff to perform full-chip SI analysis can result in too many violations, introducing a major design closure bottleneck late in the design cycle. New runtime optimizations in the latest PrimeTime release are targeted specifically at making SI analysis of large designs more practical in the earlier phases of design implementation, accelerating signoff closure.

"The latest PrimeTime release demonstrates how Synopsys' R&D continues to innovate and execute on our multicore initiative," said Antun Domic, senior vice president and general manager, Implementation Group at Synopsys. "Through continuous R&D investment, we have addressed a key STA and SI analysis challenge for our customers - utilizing CPU cores across machines to accelerate runtime. Companies can now make more effective use of their existing compute server farms while having the flexibility to take advantage of the latest multicore hardware."

PrimeTime 2008.12 is available now to all current PrimeTime customers. The latest release includes quad-core licensing as a standard feature. The multicore capability works seamlessly with job scheduling systems such as LSF from Platform Computing Corporation and Grid Computing Solutions from Sun Microsystems.

About Synopsys

Synopsys, Inc. (NASDAQ:SNPS) is the world leader in electronic design automation (EDA), supplying the global electronics market with the software, intellectual property (IP) and services used in semiconductor design and manufacturing. Synopsys' comprehensive, integrated portfolio of implementation, verification, IP, manufacturing and field-programmable gate array (FPGA) solutions helps address the key challenges designers and manufacturers face today, such as power and yield management, software-to-silicon verification and time-to-results. These technology-leading solutions help give Synopsys customers a competitive edge in bringing the best products to market quickly while reducing costs and schedule risk. Synopsys is headquartered in Mountain View, California, and has more than 60 offices located throughout North America, Europe, Japan, Asia and India. Visit Synopsys online at http://www.synopsys.com/.

Source: Synopsys, Inc.

Web Site: http://www.synopsys.com/


Contacts:
View detailed contact information.


More New Product News from this company:
Tx/Rx Controllers and PHY IP support HDMI 1.4.
USB 3.0 Protocol Analyzer delivers graphical debug solution.
System-Level Library features SuperSpeed USB 3.0 support.
Audio Codec IP helps designers increase SoC functionality.
EDA Software addresses signoff bottlenecks.
EDA Software suits pin-limited semiconductor testing.
PHY IP supports 28 nm processes in 1.8 V architecture.
Transmit/Receive Controller supports HDMI.
Electronic Design Automation Software facilitates, accelerates ASIC/FPGA development.
PHY and Controller IP supports 1,866 and 2,133 Mbps data rates.

Other News from this company:
SMIC and Synopsys Announce the Availability of Reference Flow 4.0
Synopsys CFO Brian Beattie to Speak at Citi Small and Mid-Cap Conference
Synopsys CEO Aart de Geus to Speak at the 2008 Morgan Stanley Technology Conference
Synopsys and SMIC Deliver Enhanced 90-Nanometer Reference Flow to Reduce IC Design and Test Costs
Synopsys Unveils Proteus Pipeline Technology, Delivering a New Level of Performance
Synopsys Experts on the Road IP Seminar and Keynote Luncheon with Jeff Ravencraft, President of the USB-IF
Radiospire Standardizes on Synopsys VCS and VMM Methodology for Next- Generation AirHook Chipset Designs
Synopsys CFO Brian Beattie to Speak at D.A. Davidson Electronic Systems Design Conference
Synopsys and Acceleware Deliver Hardware Accelerated Solution for Design of Optoelectronic Devices
Magma, Mentor Graphics and Synopsys Deliver Unified Power Format-Based Products
Synopsys IC Compiler Successfully Employed by Matsushita for First 45-nm SoC Design Tapeout
Synopsys CEO Aart de Geus to Speak at the Needham Growth Conference January 8, 2008
Synopsys and UMC Deliver 65-Nanometer Reference Flow
Synopsys Acquires Sandwork Design
Global Unichip Adopts Synopsys Test Solution to Achieve Higher SoC Test Quality
Synopsys Recognizes Engineers' Technical Excellence with Best Paper Awards at SNUG Boston Conference
eRide Converts to Synopsys Design Compiler Ultra for Next-Generation GPS Chips
Synopsys and SMIC Jointly Address China Mobile TV Market with Low Power Design Solution
Synopsys Senior Vice President to Speak at the 2007 Citi Global Technology Conference
Synopsys Completes Acquisition of MOSAID Semiconductor IP Assets



Click here for copyright permissions!
Copyright 2010 Thomas Publishing Company


 

Post a comment about this story

Name:
E-mail:
(your e-mail address will not be posted)
Comment title:
Comment:
 

Advertisements











Home  |  My ThomasNet News  |  Industry Market Trends  |  Submit Release  |  Advertise  |  Contact News  |  About Us
Brought to you by Thomasnet.com        Browse ThomasNet Directory

Copyright © 2010 Thomas Publishing Company
Terms of Use - Privacy Policy