System Host Boards target HPC image processing applications.
November 10, 2009 -
System host board SHB-5520 and x86 accelerator board XAB-5520 for Matrox Supersight e2 HPC platform feature Intel® Xeon® 5500 series processor with Nehalem microarchitecture for high-volume machine vision and imaging applications. Processors on both PICMG 1.3 boards have memory directly attached to CPU for high bandwidth. They also include QuickPath Interconnect to optimize communication between multiple processors to support parallel processing.
New System Boards for Matrox Supersight HPC Platform Now Available
Intel® Xeon® 5500 series processor featuring Nehalem microarchitecture improves performance in high-throughput image processing applications
November 3, 2009, Stuttgart, Germany - At Vision 2009, Matrox Imaging is announcing two PICMG 1.3 boards for its high-performance computing (HPC) platform, Matrox Supersight e2. The new system host board (SHB-5520) and the x86 accelerator board (XAB-5520) support Intel's latest-generation microarchitecture, Nehalem, through the use of the Intel 5520 chipset.
"The Nehalem microarchitecture features an all-new memory architecture coupled with QuickPath Interconnect (QPI)," explains Pierantonio Boriero, Product Line Manager, Matrox Imaging. "This is good news for demanding image processing applications like semiconductor wafer and mask inspection, flat panel display (FPD) inspection, and CT scanning."
The Nehalem microarchitecture will bring performance gains to high-throughput machine vision and imaging applications whose data volumes continue to increase. Memory directly attached to the CPU offers higher bandwidth as a result of a shorter path, so traditionally I/O-bound operations (such as arithmetic and spatial filters with small kernels) enjoy higher performance. Intel® QPI, the basis of a distributed shared memory architecture, improves communication between multiple processors, encouraging parallelism, which translates into performance gains for compute-bound operations like morphology with large kernels as well as I/O-bound operations.
About Matrox Supersight e2
Matrox Supersight e2 is a high-performance computing platform designed for imaging applications with an extremely high throughput. Leveraging multiple clusters of CPUs, GPUs and FPGAs, Matrox Supersight e2 provides an environment for considerable data and task-level parallel processing through a unique PCI Express® (PCIe®) x16 2.0 (Gen2) switch fabric. Applications for Matrox Supersight e2 are developed with the Matrox Imaging Library (MIL) and its Distributed MIL API. As MIL is supported on all Matrox Imaging hardware platforms, development on Matrox Supersight e2 is simplified and ensures the source code is portable across all devices, from nodes with 32 CPU cores and 4 FPGAs, to a node with 8 CPU cores, 1 FPGA and 6 GPUs and everything in between.
Matrox Supersight e2 SHB-5520 / XAB-5520 will be available in Q4 2009.
About Matrox Imaging
Established in 1976, Matrox Imaging is a leading developer of component-level solutions for machine vision, image analysis, medical imaging, and video surveillance. Products include frame grabbers, vision processors, imaging computers, smart cameras, and application development software. Headquartered in Montreal, Quebec, Canada, Matrox is a privately held company with offices in the United Kingdom, Ireland, Germany, and Hong Kong. For more company information, visit: www.matrox.com/imaging/about/.
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