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Testing Software automates true hierarchical board test.


April 17, 2009 - With SYSTEM CASCON(TM) Automatic Test Program Generator, users can generate board-centric Boundary Scan tests on basis of true library models of conventional components. Test programs are defined by Source Code in CASLAN, which provides more than 250 commands, and enables algorithmic vector generation, adaptive fault diagnosis, mixed signal test, and file handling. ATPG analyzes connection structures between board level and device level, and displays existent models on respective Boundary Scan pins.

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Boundary Scan Software Platform SYSTEM CASCON(TM) Automates True Hierarchical Board Test


Jena; Las Vegas NV - At the trade fair "APEX" GOEPEL electronic, worldwide leading vendor of JTAG/Boundary Scan solutions compliant with IEEE1149.x announces the launch of a new specific Automatic Test Program Generator (ATPG) for true hierarchical test at the board level in the context of the Boundary Scan software platform SYSTEM CASCON(TM).

The newly developed tool offers an unrivalled level of automation with the generation of board-centric Boundary Scan tests on the basis of true library models of conventional components. For the non-JTAG/Boundary Scan parts of the circuit, an enormously increased test quality with predictable fault coverage and pin level diagnosis is achieved without user modification.

"The productivity of the generation of Boundary Scan test programs is nowadays significantly determined by the abilities of the tools in handling non-JTAG/Boundary Scan components. For this our new ATPG sets a whole new quality standard," says Raj Puri, US Marketing and Sales Manager at GOEPEL electronic. "Due to the complete portability of the component test models independent from the design of the target board, the user no longer has to worry about the component tests, and constant model manipulations become redundant. The test program generation as a whole becomes more effective and safe for the customer."

The basis of the hierarchical test concepts are component test programs that are a constant part of the complete system, and are administered by complete device libraries. These models are easily exportable to other stations. The test programs itself are defined by Source Code in CASLAN (CAScon LANguage). CASLAN is a specialised Boundary Scan programming language with more than 250 commands, and enables algorithmic vector generation, adaptive fault diagnosis, interactive user communication, mixed signal test and file handling, to name just a few. Due to the total independence of the models from the target UUT, a central or local data management is possible.

Afterwards, the ATPG is able to analyse the connection structures between the board level and device level, and to display the existent models on the respective Boundary Scan pins. Buffers, or other intermediate elements, are handled automatically in consideration of possible constraint definitions for the board. Also the ATPG is generated by CASLAN Source Code; it can be verified in the graphical debugger if required. This principle enables the effective debugging of component test programs directly in the board environment, and the immediate return of the verified model into the library.

On this basis, using ATPG, a multitude of active and passive components can be tested, like switches, jumper, LED, relays, clock generators, AD converter, DA converter, communication interfaces, Bus interfaces, or other unscannable ICs. At the same time, the ATPG generates a test coverage report, which allows the user to carry out specific optimisations.

The new ATPG tool is a standard integration starting from SYSTEM CASCON(TM) version 4.5, and is activated by the licence manager. For users with a valid software maintenance contract, the release is free of charge. The models can be either generated by the user himself or purchased from GOEPEL electronic.

About GOEPEL electronic:

GOEPEL electronic is a worldwide leading vendor of professional JTAG/Boundary Scan solutions and technology innovator of IP based instrumentation. With more than 100 new product launches over the last five years alone the company established its position as the market's leading innovator. A network of branch offices, distributors, and service partners ensures the global availability of the products as well as the support of the more than 7,000 system installations. Founded 1991 and headquartered in Jena, Germany, GOEPEL electronic has currently about 160 employees and generated a revenue of 19.7 Million Euro in 2008. GOEPEL electronic has continuously been ISO 9001 certified since 1996 and has been honoured with the TOP-JOB award for being one of the best medium-sized companies in Germany. GOEPEL electronic's products won several awards in recent years and are used by the leading companies in telecommunication, automotive, space and avionics, industrial controls, medical technology, and other industries. Further information about the company and its products can be found on the internet at www.goepel.com.

Kontakt:

GOEPEL electronic GmbH

Stefan Meissner

Goeschwitzer Strasse 58/60

07745 Jena

Tel.: 03641-6896-739

Fax: 03641-6896-944

E-Mail: presse@goepel.com

Internet: www.goepel.com


Contacts:

General Information:
GOEPEL electronic GmbH
Stefan Meissner
Goeschwitzer Strasse 58/60
Jena 07745
INTL
Phone: 03641-6896-739
FAX: 03641-6896-944
Send email  E-mail this person

Company Information:
Name: GOEPEL electronics LLC
Address: 9600 Great Hills Trail, Suite 150 W
City: Austin
State: TX
ZIP: 78759
Country: USA
Phone: 512-502-3010
FAX: 512-502-3076
http://www.goepel.com


More New Product News from this company:
Boundary Scan Controller is designed for cabled PCI Express.
Bus Access Cables support test of RS232 interfaces.
JTAG/Boundary Scan DIO Module is based on PXI bus.
JTAG/Boundary Scan Software supports automotive Power PC(TM) processors.
Boundary Scan Software enables analysis of fault coverage.
Universal Boundary Scan Tester integrates test electronics.
AOI Software provides advanced fault detection.
Interface Cards support ultra-low voltage applications.
Digital I/O Module combines boundary scan/at-speed test.

Other News from this company:
Reliable Detection of Critical Faults Independent from the PCB Layout
Vector Link Combines Teradyne® In-Circuit Tester with Boundary Scan Software Platform SYSTEM CASCON(TM)
Boundary Scan Platform SCANFLEX® Successfully Integrated into Teradyne In-Circuit Tester
GOEPEL electronic Demonstrates First VarioCore-IP(TM) for Universal Programming and Testing Applications



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