Press Release
Release date: April 2, 2008
MathStar Releases Second Generation MPEG-2 Encoder IP Core for the Arrix® Family of FPOAs
Delivers Enhanced Performance and MPEG2 Transport Stream Support
HILLSBORO, Ore., April 2, 2008 / / - MathStar, Inc. (NASDAQ:MATH), a fabless semiconductor company specializing in high-performance programmable logic, today announced the release of its second generation MPEG-2 Encoder Intellectual Property (IP) core for applications using the company's field programmable object array (FPOA) chips. Building on the successful integration of its first generation core into high-performance video customer LG Electronics' MPEG-4/H.264 to MPEG-2 transcoder solution for the hospitality industry, MathStar's enhanced core supports full 4:2:2 color space, 1080i/720p resolution encoding, and optional MPEG-2, Part 1 compliant transport stream encoding for packet networks and broadcasting.
Utilized by multiple customers in professional and broadcast video applications, MathStar's IP cores speed time to market by enabling quick and efficient deployment of performance-demanding FPOA designs.
"Our second generation MPEG-2 Encoder IP strengthens MathStar's expanding IP portfolio and demonstrates our continuing commitment to providing advanced video encoding and transcoding solutions," said Dan Sweeney, MathStar's President and COO.
MathStar will demonstrate its MPEG-2 encoder core for the Arrix Family FPOA in an MPEG-4/H.264 to MPEG-2 transcoder utilizing a live DirecTV(R) 720p feed at the 2008 National Association of Broadcasters (NAB) Show April 14-17 in Las Vegas.
About MathStar, Inc.
MathStar (NASDAQ:MATH) is a fabless semiconductor company offering best-in-class, high performance programmable logic solutions. MathStar's field programmable object array (FPOA) can process arithmetic and logic operations at clock rates of 1-gigahertz, which is up to four times faster than even the most advanced FPGA architectures in many applications. MathStar's Arrix family of FPOAs are high-performance programmable solutions that enable customers in the machine vision, high-performance video, medical imaging, security & surveillance and military markets to rapidly and cost effectively innovate and differentiate their products. FPOAs are available now and are supported by development tools, IP cores, application notes and technical documentation. For more information, please visit http://www.mathstar.com/.
Source: MathStar, Inc.
CONTACT: Sean Riley of MathStar, Inc., +1-503-726-5500, info@mathstar.com
Web site: http://www.mathstar.com/
Contacts:
Public Relations:
McClenahan Bruer Communications
Jeff Hardison
USA
Phone: 503-546-1000
 E-mail this person
General Information:
Sean Riley
USA
Phone: 503-726-5500
E-mail this person
Company Information:
Name: MathStar
Address: 19075 NW Tanasbourne Drive
City: Hillsboro
State: OR
ZIP: 97124
Country: USA
Phone: 503-726-5500
FAX: 503-726-5501
http://www.mathstar.com
|
|
|
|
| Related Stories: | | Sep 5, 2008 | Processor Core is delivered as soft IP core in Verilog RTL. |
| Aug 22, 2008 | Development Kit helps build embedded processing systems. |
| Aug 20, 2008 | IP Cores add USB functionality to mobile device SoCs. |
| Aug 8, 2008 | GPS RF Tuner IP Core is optimized for size, functionality. |
| Aug 4, 2008 | Processor Cores are fully synthesizable for flexibility. |
| Jul 25, 2008 | Integrated Device facilitates SATA integration. |
| Jul 21, 2008 | HDMI® 1.3 PHY IP Core operates at up to 10.5 Gbps. |
| Jun 25, 2008 | Low Power Processing Cores suit portable/embedded MCU market. |
| Jun 25, 2008 | IP System includes PCI-SIG I/O virtualization technology. |
| Jun 18, 2008 | Real-Time Operating System enhances DSP architectures. |
| May 1, 2008 | PHY IP promotes PCI Express interface integration. |
| May 1, 2008 | Integrated SoC Devices consume low power at 1 GHz speed. |
| Apr 21, 2008 | USB PHY IP enables interoperability with USB 2.0 products. |
| Apr 17, 2008 | Camera Processor IP Core enhances mobile devices. |
| Apr 16, 2008 | IP Core operates at 800 Mbps. |
| Apr 7, 2008 | Endpoint Digital Controller IP simplifies transition to PCIe. |
| Apr 4, 2008 | IP Core optimizes performance through multi-threading. |
| Mar 7, 2008 | Intellectual Property Core offers speeds to 150 Gbps. |
| Feb 11, 2008 | Digital Controller and PHY IP enable power efficient ICs. |
| Jan 14, 2008 | IP Core facilitates developmet of SATA storage solutions. |
| |
|
| Other News from this company: | | Feb 19, 2008 |
MathStar, Inc. Chips Support LodgeNet's Move Into High-Definition Television Services for the Hospitality Industry
|
| Feb 05, 2008 |
MathStar, Inc. Completes Transcoder Subsystem for LG Electronics
|
| Aug 07, 2007 |
MathStar, Inc. Announces High Definition MPEG-2 Encoder IP Core for the Arrix(TM) FPOA
|
| Jul 24, 2007 |
Nuvation Joins MathStar's Certified Design Center Program
|
| Feb 27, 2007 |
MathStar, Inc. and Mentor Graphics Announce Partnership for Field Programmable Object Array Design Tools
|
| Feb 13, 2007 |
MathStar, Inc. Introduces MathStar Certified Design Center Program
|
| Jan 30, 2007 |
MathStar, Inc. Expands Sales and Support Operation in Europe, Middle East and Africa
|
| Nov 21, 2006 |
Announces First Customer Shipments of the Arrix(TM) Family of Field Programmable Object Arrays(TM)
|
| May 09, 2006 |
MathStar, Inc. Announces Machine Vision Library for the Field Programmable Object Array(TM) (FPOA(TM))
|
| May 04, 2006 |
MathStar, Inc. Announces Version 2.0 of the FPOA(TM) Design Tools and First Customer Shipment Dates for the Next Generation FPOA
|
|
|
|
![[Get Copyright Permissions]](http://license.icopyright.net/images/icopy-w.gif){kind=small}
