June 7, 2005 - Intended for identification and financial applications, 32-bit Model AE55C1 incorporates CPU core, 40 Kbytes of EEPROM, and 240 Kbytes mask ROM. Upward compatibility with existing system facilitates migration to AE55C1 and system development.
Archive Press Release
(Products mentioned in this Archive Press Release may or may not be available from the manufacturer.)
Release date: May 19, 2005
Renesas Technology Releases AE55C1 High-Security 32-bit Smart Card Microcontroller for Financial and ID Applications
Tokyo (JCNN) - Renesas Technology announced on May 19th the June launch of the AE55C1 smart card microcontroller. Designed for use in financial, identification, and other similar applications, the chip incorporates a high-performance CPU core, 40 Kbytes of EEPROM, and 240 Kbytes of mask ROM.
The embedded CPU core delivers overall 8-fold improvement in processing performance over its predecessor. Its upward compatibility with the existing system facilitates migration to the AE55C1 and system development.
Sample shipments will begin in June 2005. Unit prices are 546 yen ($5.10) on wafer and 588 yen ($5.23) in lots of 1,000 units on tape.
News provided by ThomasNet Industrial Newsroom® (TIN). TIN is a comprehensive source
of new and timely product information in the industrial marketplace. TIN supplies new product
information to the web sites, e-marketplaces and print publications that serve the
industrial marketplace. For press release submissions please go to
http://www.productnews.com/SubmitPRPage.html.
BY ACCESSING, BROWSING AND/OR USING THIS WEB SITE AND/OR ANY WEB SITES PROVIDED BY
ProductNews.com, YOU AGREE TO BE BOUND BY THE TERMS OF USE
AGREEMENT.
![[Get Copyright Permissions]](http://license.icopyright.net/images/icopy-w.gif){kind=small}
07_2.gif)
