PECVD System supports sub-28 nm dielectric films.

Novellus Systems, Inc.    San Jose, CA 95134
Mar 22, 2011 Incorporating interface engineering to minimize RC delay constant without changing materials, VECTOR® Excel(TM) addresses needs of advanced technology nodes that require pre- and/or post-processing of dielectric films, such as diffusion barriers. System's PECVD module employs multi-station sequential deposition architecture that results in optimal wafer-to-wafer, within-wafer, and point-to-point repeatability, with each wafer progressing through single deposition path.

Double Side Lapping System aids silicon wafer manufacturing.

Novellus Systems, Inc.    San Jose, CA 95134
Mar 03, 2011 Equipped with 2,100 mm OD lapping wheel, AC-2100L microLine® can process up to twenty 300 mm prime silicon wafers in one batch with sub-micron precision. It can also process up to eight 450 mm wafers. Along with independently driven inner and outer pin rings, features include automatic force calibration, in-situ wafer thickness metrology, and contactless gauges. Latter controls lapping wheel gap dimension, ensuring repeatable within-batch and batch-to-batch wafer thickness.

High-Throughput PECVD System serves semiconductor industry.

Novellus Systems, Inc.    San Jose, CA 95134
Jan 31, 2011 Intended for memory manufacturers, VECTOR® Extreme(TM) TEOS xT(TM) plasma enhanced chemical vapor deposition (PECVD) system delivers production throughput in excess of 300 wafers per hour using DPC(TM) hardware for deposition rate optimization, RapidClean(TM) for accelerated chamber cleans, and xT(TM) wafer handler for precision wafer placement. With fewer than 10 particle adders per wafer for defect sizes greater than 70 nm, nanoscale defect levels exceed requirements for 24 nm memory devices.

3D Electroplating System simplifies wafer level packaging.

Novellus Systems, Inc.    San Jose, CA 95134
Jul 21, 2010 SABRE 3D electroplating system has modular architecture that delivers processes such as copper through-silicon vias, copper redistribution layers, pillars, under-bump metallization, and lead-free micro-bumping. Enabling multi-layer processing, system includes TurboCell(TM) technology for through-resist plating applications that improves film uniformity and alloy consistency. It also features in-line isotropic wet etch process that allows independent control of plated copper fill and overburden.

Tungsten Nitride Film lowers via resistance on memory chips.

Novellus Systems, Inc.    San Jose, CA 95134
May 18, 2010 DirectFill CVD tungsten nitride (WN) liner-barrier film is deposited using ALTUS platform with multi-station sequential deposition architecture and pulsed nucleation layer (PNL®) technology. Ultra-thin, 20-angstrom WN film, applied to copper interconnects, features micro-crystalline structure that provides low resistivity diffusion barrier. Film structure eliminates diffusion barrier breakdown mechanisms that result in copper silicide formation and volcano defects.

Copper Barrier-Seed PVD System is intended for TSV packaging.

Novellus Systems, Inc.    San Jose, CA 95134
Mar 12, 2010 For copper barrier-seed applications, INOVA® NExT PVD system features Hollow Cathode Magnetron (HCM) IONX source technology. Copper barrier-seed physical vapor deposition (PVD) process, intended for through-silicon-via (TSV) packaging market, delivers optimal sidewall and bottom coverage and enables void-free copper fill during subsequent TSV electroplating step. TSVs enable 3D packaging, where multiple chips are stacked on top of each other into one 3D module.

UV Thermal Processing System suits sub-45 nm manufacturing.

Novellus Systems, Inc.    San Jose, CA 95134
Jan 20, 2010 Used in manufacturing of advanced logic devices at 45 nm and below, SOLA xT modifies physical characteristics of previously deposited film through exposure to UV light and heat. System features customizable optics assembly, on-board UV monitoring, and advanced algorithms to maintain stable wafer-to-wafer performance. With multi-station sequential processing architecture, system allows independent control of temperature, wavelength, and intensity at each station.

Electroplating System meets yield requirements for 22 nm node.

Novellus Systems, Inc.    San Jose, CA 95134
Oct 27, 2009 Providing optimal fill and defect density performance for 22 nm technology node and beyond, SABRE Excel Copper Electroplating System features deposition module incorporating IRISCell technology, as well as hardware, software, and communications upgrades. IRISCell employs field shaping elements that enable dynamic current modulation during deposition process, while Multiwave(TM) Entry plating process provides millisecond control of voltage profile during initial stages of copper deposition.

Dielectric Constant Films enable 32 nm device integration.

Novellus Systems, Inc.    San Jose, CA 95134
Jul 01, 2009 Promoting reliability over porous alternatives, Dense ultra low dielectric constant (ULK) films are deposited using single precursor and do not require strict queue-time control. Ultra-violet thermal processing (UVTP) increases mechanical strength through cross-linking of bonds, and vertically etched structures can be obtained when patterning due to chemical homogeneity throughout layer. Patterning capability translates into optimized breakdown voltage and minimized leakage currents.

Flexible HDP CVD Platform is optimized for productivity.

Novellus Systems, Inc.    San Jose, CA 95134
Jul 25, 2008 Addressing needs of flash, DRAM, and logic IC manufacturers, SPEED® Max(TM) high-density plasma (HDP) CVD platform delivers flexibility to process multiple layers and applications on one platform. Plasma source technology extends its gapfill capabilities to 32 nm node, and other features address process uniformity as well as defectivity. Available in 200 and 300 mm configurations, platform integrates ceramic dome, large volume chamber, and high vacuum pumps.