Process Allows Nanoscale MEMS to be created inside CMOS wafer.

Baolab Microsystems, S.L.    Terrassa, 08220
Mar 10, 2010 NanoEMS(TM) technology enables construction of nanoscale MEMS (Micro Electro Mechanical Systems) within structure of actual CMOS wafer itself using standard, high-volume CMOS lines. Existing metal layers in CMOS wafer are used to form MEMS structure via standard mask techniques, and Inter Metal Dielectric is etched away using vapour HF. Etching uses equipment already available for volume production and takes less than 1 hr. Holes are then sealed, and chip is packaged as required.