Global Unichip Adopts Synopsys Test Solution to Achieve Higher SoC Test Quality


Advanced Delay Test Capabilities in TetraMAX Improve At-Speed Test Quality

MOUNTAIN VIEW, Calif., Sept. 27 - Synopsys, Inc. (NASDAQ:SNPS), a world leader in semiconductor design software, today announced that Global Unichip Corporation (GUC; TW:3443), a leading system-on-chip (SoC) design foundry, has adopted the Synopsys test solution to further improve SoC test quality. Employing Synopsys' TetraMAX® automatic test pattern generation (ATPG) technology, GUC can strengthen the quality of its at-speed test solution and reduce return material authorizations (RMAs), also referred to as test escapes. GUC also intends to utilize Synopsys' DFT MAX scan compression solution to reduce the test time associated with the increased design complexity and pattern counts inherent in at-speed test methodologies.

DFT MAX automates the creation of scan compression circuits on-chip that substantially decrease the amount of data and time required to test digital designs. After a thorough evaluation, GUC selected DFT MAX because the tool exceeded GUC's compression goals with only a modest level of effort required to integrate it into the company's existing design flows.

"At GUC, we rigorously test each product to ensure it meets our high quality standards," said Louis Lin, senior director of Design Service at GUC. "As our design complexity increased and our manufacturing process shifted to 90- and 65-nanometers, delay testing became mandatory to enhance test coverage. By adopting the TetraMAX at-speed test solution, we improved test quality for several projects. In addition, we used DFT MAX scan compression to reduce test data volume by more than 90 percent on several designs, and the compressed patterns were later successfully applied on our testers to verify working silicon. It was easy to get DFT MAX working with little impact on our delivery schedules and we are impressed with the test results."

DFT MAX's gates-only implementation has minimal area impact on designs. By avoiding the use of complex sequential state machines for compression/decompression, the adaptive scan architecture disperses test logic throughout the design, alleviating wire routing congestion and reducing silicon area overhead cost.

"DFT MAX and TetraMAX together deliver the most advanced EDA technology to achieve high testing quality," said Gal Hasson, senior director of Synthesis and Test Marketing at Synopsys. "Synopsys' test solution has proven to be of tremendous value to IC design service providers like GUC which differentiate themselves based on the timely delivery of highly reliable solutions."

About Global Unichip Corp.

Global Unichip Corp. (GUC; TW:3443), a dedicated full service SoC (system- on-chip) design foundry based in Taiwan, was founded in 1998. GUC provides total solutions from silicon-proven intellectual property to complex time-to- market SoC turnkey services. GUC is committed to providing the most advanced and the best price-performance silicon solutions through close partnerships with TSMC, GUC major shareholders, and other key packaging and testing powerhouses. With state-of-the-art EDA tools, advanced methodologies, and an experienced technical team, GUC ensures the highest quality and lowest risks to achieve first-silicon success. GUC has established a global customer base throughout Greater China, Japan, Korea, North America, and Europe. Its track record in complex SoC designs has brought benefits to customers in time-to-revenue at the lowest risk. For more information, please visit http://www.globalunichip.com/.

About Synopsys

Synopsys, Inc. (NASDAQ:SNPS) is a world leader in electronic design automation (EDA) software for semiconductor design. The Company delivers technology-leading semiconductor design and verification platforms and IC manufacturing software products to the global electronics market, enabling the development and production of complex systems-on-chips (SoCs). Synopsys also provides intellectual property and design services to simplify the design process and accelerate time-to-market for its customers. Synopsys is headquartered in Mountain View, California, and has more than 60 offices located throughout North America, Europe, Japan and Asia. Visit Synopsys online at http://www.synopsys.com/.

Editorial Contacts: Sheryl Gulizia of Synopsys, Inc., +1-650-584-8635, sgulizia@synopsys.com, or

Lisa Gillette-Martin of MCA, Inc., +1-650-968-8900 ext. 115, lgmartin@mcapr.com, or

Florence Chi of Global Unichip Corp., +886-3-564-6600, pr@globalunichip.com

Source: Synopsys, Inc.

Web site: http://www.synopsys.com/

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