Xilinx Showcases Smarter Wired Networks and Data Center Solutions at Interop 2014
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San Jose, CA, 95124 3400
Press release date: March 25, 2014
SAN JOSE, Calif. – Xilinx, Inc. (NASDAQ: XLNX) will showcase smarter networks and data center solutions at Interop 2014. In-booth demonstrations will highlight new design solutions and IP that enable the creation of All Programmable Line card architectures and Monte Carlo applications. To learn more, visit Xilinx at Interop Las Vegas Booth #2066, March 31 - April 4, 2014 at the Mandalay Bay Convention Center.
Xilinx Demonstrations - Booth #2066
- Programmable Data Plane Processing Line Card Solution This demonstration
showcases a state-of-the-art packet processing and hierarchical traffic
manager running at 100Gbps on a Xilinx® Virtex®-7 FPGA. The packet
processing SmartCORE™ IP enables hitless in-service personality
updates while running at the full line rate and without service
interruptions. The traffic manager SmartCORE IP assures granular QoS
demanded by next-generation networking services.
- OpenCL Demonstration This demonstration showcases acceleration of Monte
Carlo options pricing simulations running on the Alpha Data ADM-PCIE-7V3
FPGA board in an x86 platform developed with the OpenCL design
environment for Xilinx devices.
Xilinx Demonstration by Alliance Program Member
Xilinx Alliance Program member MoSys (Booth #1863) will demonstrate its Bandwidth Engine serial interface memory at 15.625G using a Xilinx Kintex® UltraScale™ device.
Xilinx is the world's leading provider of All Programmable FPGAs, SoCs and 3D ICs. These industry-leading devices are coupled with a next-generation design environment and IP to serve a broad range of customer needs, from programmable logic to programmable systems integration. For more information, visit www.xilinx.com.
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Silvia E. Gianelli
Web Site: http://www.xilinx.com