New Technical Paper From Toshiba Addresses Power-Saving Clock-Gated Design for Higher Performing Custom SoCs
SAN JOSE, Calif., July 23 / -- Toshiba America Electronic Components, Inc. (TAEC)*, a committed leader that collaborates with technology companies to create breakthrough designs, today announced the publication of a new Pointers & Pitfalls technical paper entitled "Power-Saving Clock-Gating Technique is an Inseparable Part of SoC Design."
The new technical paper explains that strict chip power requirements have led to clock gating increasingly becoming an inseparable part of custom system-on-chip (SoC) design. Compared to similar non-clock-gated designs, clock-gated designs theoretically can achieve both lower power consumption and improved timing performance. The biggest power-savings of clock-gating are manifest in dataflow-intensive designs. In portable electronics systems, the system-level benefits of clock gating can include longer battery life, improved reliability and less costs associated with heat reduction.
The document shows a general implementation flow for clock-gated designs and culminates with a comprehensive list of pointers and pitfalls. For example, at the RTL phase, it is important to perform power simulation to confirm the power savings before incorporating clock gating into the design. Also, designers should remember to provide extra timing margins for the clock signals to the clock gates. The paper cautions that soft clock gates should be avoided as they require specialized layout work; instead, integrated clock-gate cells from the ASIC library should be used. Toshiba offers a suite of design tools and methodologies to support the entire process of clock gating, including static timing analysis, clock tree synthesis, design-for-testability and dynamic power analysis.
The Pointers & Pitfalls series of technical papers provide engineering and design insights to help engineers understand evolving custom SoC design issues and support their product planning decisions. The company invites designers to tap into this deep system-level expertise to enable higher productivity and greater success.
The new Clock-Gating technical paper can be accessed and downloaded from the TAEC website at:
http://www.toshiba.com/taec/adinfo/socworld/pointers.html
About TAEC
Through proven commitment, lasting relationships and advanced, reliable electronic components, Toshiba enables its customers to create market-leading designs. Toshiba is the heartbeat within product breakthroughs from OEMs, ODMs, CMs, distributors and fabless chip companies worldwide. A committed electronic components leader, Toshiba designs and manufactures high-quality, flash memory-based storage solutions, discrete devices, displays, medical tubes, custom SoCs/ASICs, digital multimedia and imaging products, microcontrollers and wireless components, that make possible today's leading cell phones, MP3 players, cameras, medical devices, automotive electronics and more.
Toshiba America Electronic Components, Inc. is an independent operating company owned by Toshiba America, Inc., a subsidiary of Toshiba Corporation, Japan's largest semiconductor manufacturer and the world's fourth largest semiconductor manufacturer (iSuppli, World's Top Semiconductor Supplier Rankings in 2006). For additional company and product information, please visit http://www.toshiba.com/taec/.
Source: Toshiba America Electronic Components, Inc.
CONTACT:Agency Contact, Judy Kahn for Toshiba America Electronic Components, Inc., +1-650-948-8881, judith.kahn@comcast.net; or Company Contact, Deborah Chalmers of Toshiba America Electronic Components, Inc.,
+1-408-526-2454, deborah.chalmers@taec.toshiba.com
Web site: http://www.toshiba.com/taec
TAEC reader inquiries please publish: Tech.Questions@taec.toshiba.com.
