NEC Develops Technology That Enables Observation of Internal Operating Margins in Advanced LSI Devices |
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NEC Corporation
7-1, Shiba 5-chome
Tokyo, 108-8001
Japan
Press release date: February 13, 2007
TOKYO, Feb. 13 /- NEC Corporation and NEC Electronics have developed a new technology that intentionally introduces signal jitter(*1) into the internal clock of a large-scale integrated circuit (LSI) so that the internal operating margins of the LSI can be accurately and efficiently observed. By combining this new technology with physical quantity measurement technologies related to power voltage fluctuations and other matters of internal quality, the two companies have constructed new design and quality inspection schemes that will support the development of advanced LSI chips.
Normally, in the design of LSI devices, engineers make predictions about voltage fluctuation, signal jitter, and internal operating margins and then establish appropriate margins to ensure optimum device quality. With the increasing detail and scale of such devices, however, it is impossible to sufficiently grasp the operating characteristics of internal signals using conventional analytical technologies, making it necessary to set slightly larger margins during the design process. As a result, operating speeds have become limited, and devices cannot fully demonstrate the merits of ultra-fine design. The evolution of ultra-fine, large-scale LSIs has made it increasingly difficult to determine at the chip selection stage whether an LSI had been correctly designed and manufactured. As a result, manufacturers have been unable to produce them at lower costs and with the same high level of quality as in devices of the past. The newly developed technology from NEC and NEC Electronics overcomes many of these issues by incorporating several key features.
(1) A new on-chip clock jitter formation circuit intentionally introduces jitter into an LSI's internal clock signals.
(2) New design and quality inspection schemes, a combination of the new technology and several physical quantity measurement technologies, enable designers to observe signal quality in greater detail, thus improving validation of chip quality.
Up to now, semiconductor manufacturers used a well-known method to observe operating margins during the chip selection test stage, increasing oscillation frequency of clock signals from outside the LSI to a level higher than the design frequency. However, it was impossible with this method to replicate the exact conditions (noise, heat, electromagnetic interference etc.) of the operating environment, or to test with the kind of data that would be used during actual operation. Furthermore, the maximum clock frequency and clock signal quality were limited. All of these factors made it impossible for designers to input clock signals and observe operating margins with a high degree of accuracy. In addition, this method generally became impractical due to the difficulty of changing clock frequencies during operation of a system in which the LSI was mounted.
With the new method, an on-chip clock jitter formation circuit is used to intentionally introduce jitter and periodically switch between clock signals with long and short oscillating frequencies -- without changing oscillating frequency of the clock signal introduced from outside the LSI. In this way, it is possible to introduce jitter into the clock signals without affecting communication between devices or between circuit blocks within a given LSI(*2), making it possible for a designer to observe operating margins with a high degree of accuracy during chip selection tests and during operation of a system in which an LSI is mounted. Furthermore, by combining this technology with physical quantity measurement circuits related to internal quality (such as power voltage fluctuations), NEC and NEC Electronics have made it possible for designers to identify the causes and locations of LSI instability and to accurately respond to those conditions at any particular time. These results can then be reflected in next-generation LSI design and selection tests to create new design and quality inspection schemes.
NEC and NEC Electronics are confident that these newly developed LSI design and quality inspection schemes will contribute to increased performance and lower costs for new ultra-fine LSIs, and are committed to undertaking ongoing research and development activities aimed at providing high-quality LSIs in the future.
NEC will present the above R&D results on February 13 at the International Solid-State Circuits Conference (ISSCC 2007), which will be held in San Francisco, California, from February 11 to 15.
(*1): Refers to signal fluctuations over time. For example, in the case of a clock signal, when the pulse position shifts out of the desired position, the volume of that shift is referred to as jitter.
(*2): Oscillation frequencies in clock signals under these conditions will show no changes when viewed as an average over a long-term range, so clock signal jitter does not affect communication between LSIs or between circuit blocks in a given LSI. When viewed over a short-term range, as in units of one or two cycles, however, the oscillation frequency appears to change and enables observation of the operating margin.
About NEC Corporation
NEC Corporation (NASDAQ:NIPNY) is one of the world's leading providers of Internet, broadband network and enterprise business solutions dedicated to meeting the specialized needs of its diverse and global base of customers. NEC delivers tailored solutions in the key fields of computer, networking and electron devices, by integrating its technical strengths in IT and Networks, and by providing advanced semiconductor solutions through NEC Electronics Corporation. The NEC Group employs more than 150,000 people worldwide.
For additional information, please visit the NEC home page at: http://www.nec.com/ .
* Newsroom: http://www.nec.co.jp/press/en/newsroom/index.html .
About NEC Electronics
NEC Electronics Corporation specializes in semiconductor products encompassing advanced technology solutions for the high-end computing and broadband networking markets, system solutions for the mobile handset, PC peripherals, automotive and digital consumer markets, and platform solutions for a wide range of customer applications. NEC Electronics Corporation has 24 subsidiaries worldwide including NEC Electronics America, Inc. (www.am.necel.com) and NEC Electronics (Europe) GmbH (www.eu.necel.com). For additional information about NEC Electronics worldwide, visit www.necel.com.
Source: NEC Corporation
CONTACT: Diane Foley of NEC Corporation, +81-3-3798-6511, d-foley@ax.jp.nec.com,
or
Sophie Yamamoto of NEC Electronics Corporation, +81-44-435-1676, sophie.yamamoto@necel.com
Web site: http://www.necel.com/
Web site: http://www.nec.co.jp/
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