Kawasaki Microelectronics America, Inc.
San Jose, CA 95131
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Burst-Mode CDR SerDes targets XGPON1 OLT applications.
Available in 65 nm and 40 nm process technologies for ASIC integration, burst-mode CDR SerDes PHY chip can lock to upstream data burst at 2.488 Gbps in less than 16 bits. Device is also available as standalone chip for supporting reference designs. In addition, CDR SerDes can be configured to optimize burst-mode lock time in OLT solutions for GPON standards operating at 1.25 Gbps. With...
Read More »Burst Mode CDR SerDes is suited for GPON OLTs.
Burst mode CDR SerDes PHY, supplied in 172-pin LBGA package, can be operated in automatic or manual mode and lock to upstream data burst at 1.244 Gbps in less than 20 bits. Using its transmit and receive parallel ports in TTL I/Os, product is suited for development of FPGA-based OLT reference designs. It is also available for multi-channel integration into ASICs and can be configured to improve...
Read More »FPGA Board enhance ASIC development and testing.
FPGA boards accelerate hardware and software development time associated with complex ASIC designs on CatsEye Development system. They are used to add logic to CatsEye chip platform, allowing full integration and testing of developers' IP before releasing design to fabrication. Connected to CatsEye Development system board via high-speed OCP inter-board connection, FPGA boards include Xilinx...
Read More »Development System helps speed complex ASIC design.
Providing all functions needed to make complete CPU subsystem, CatsEye Development System contains CatsEye chip with 2 MIPS 24Kf cores, along with variety of interfaces such as memory controller, Flash memory controller, 2 Gb Ethernet, OCP interfaces for adding other IP to design, 3 UARTS, PCI Express device, and GPIO pins. With development system, users can do concurrent hardware and software...
Read More »K-micro Runs Digital TV Devices on TSMC 90nm Embedded RAM
SAN JOSE, Calif., May 9 // -- K-micro (Kawasaki Microelectronics, Inc.) and Taiwan Semiconductor Manufacturing Company, Ltd. (NYSE:TSM) (TSMC), today revealed that K-micro has successfully launched its digital television (DTV) semiconductor product line using TSMC's 90nm embedded DRAM (eDRAM) technology. The new ASIC line addresses increased market demand for a high performance single chip,...
Read More »Burst-Mode CDR SerDes targets XGPON1 OLT applications.
Available in 65 nm and 40 nm process technologies for ASIC integration, burst-mode CDR SerDes PHY chip can lock to upstream data burst at 2.488 Gbps in less than 16 bits. Device is also available as standalone chip for supporting reference designs. In addition, CDR SerDes can be configured to optimize burst-mode lock time in OLT solutions for GPON standards operating at 1.25 Gbps. With...
Read More »Burst Mode CDR SerDes is suited for GPON OLTs.
Burst mode CDR SerDes PHY, supplied in 172-pin LBGA package, can be operated in automatic or manual mode and lock to upstream data burst at 1.244 Gbps in less than 20 bits. Using its transmit and receive parallel ports in TTL I/Os, product is suited for development of FPGA-based OLT reference designs. It is also available for multi-channel integration into ASICs and can be configured to improve...
Read More »FPGA Board enhance ASIC development and testing.
FPGA boards accelerate hardware and software development time associated with complex ASIC designs on CatsEye Development system. They are used to add logic to CatsEye chip platform, allowing full integration and testing of developers' IP before releasing design to fabrication. Connected to CatsEye Development system board via high-speed OCP inter-board connection, FPGA boards include Xilinx...
Read More »Development System helps speed complex ASIC design.
Providing all functions needed to make complete CPU subsystem, CatsEye Development System contains CatsEye chip with 2 MIPS 24Kf cores, along with variety of interfaces such as memory controller, Flash memory controller, 2 Gb Ethernet, OCP interfaces for adding other IP to design, 3 UARTS, PCI Express device, and GPIO pins. With development system, users can do concurrent hardware and software...
Read More »K-micro Runs Digital TV Devices on TSMC 90nm Embedded RAM
SAN JOSE, Calif., May 9 // -- K-micro (Kawasaki Microelectronics, Inc.) and Taiwan Semiconductor Manufacturing Company, Ltd. (NYSE:TSM) (TSMC), today revealed that K-micro has successfully launched its digital television (DTV) semiconductor product line using TSMC's 90nm embedded DRAM (eDRAM) technology. The new ASIC line addresses increased market demand for a high performance single chip,...
Read More »